| Message ID | 20181214021516.43609-1-purna.chandra.mandal@intel.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Ambarus Tudor |
| Headers | show |
| Series | mtd: spi-nor: cadence-quadspi: write upto 8-bytes data in STIG mode | expand |
Hi, Purna, On 12/14/2018 04:15 AM, Purna Chandra Mandal wrote: > cadence-quadspi controller allows upto eight bytes of data to be transferred > in software Triggered Instruction generator (STIG) mode of operation. Lower > 4 bytes are written through writedatalower and upper 4 bytes by > writedataupper register. Is this supported by all versions of the IP? > > This patch allows all the 8 bytes to be written. > > Signed-off-by: Purna Chandra Mandal <purna.chandra.mandal@intel.com> > --- > > drivers/mtd/spi-nor/cadence-quadspi.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c > index 04cedd3a2bf6..990934387fea 100644 > --- a/drivers/mtd/spi-nor/cadence-quadspi.c > +++ b/drivers/mtd/spi-nor/cadence-quadspi.c > @@ -420,7 +420,7 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode, > unsigned int data; I know that this is not your change, but data should be u32 and not unsigned int. reg too ... probably one should submit a patch to change this, I see that the same error is done in cqspi_command_read(). > int ret; > > - if (n_tx > 4 || (n_tx && !txbuf)) { > + if (n_tx > CQSPI_STIG_DATA_LEN_MAX || (n_tx && !txbuf)) { > dev_err(nor->dev, > "Invalid input argument, cmdlen %d txbuf 0x%p\n", > n_tx, txbuf); > @@ -435,8 +435,13 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode, > data = 0;> memcpy(&data, txbuf, n_tx); You should limit what is copied in data, similar to what is done in cqspi_command_read(): write_len = (n_tx > 4) ? 4 : n_tx; memcpy(&data, txbuf, write_len); txbuf += write_len; > writel(data, reg_base + CQSPI_REG_CMDWRITEDATALOWER); > - } > > + if (n_tx > 4) { > + data = 0; and then: write_len = n_tx - 4; memcpy(&data, txbuf, write_len); Cheers, ta > + memcpy(&data, txbuf + 4, n_tx - 4); > + writel(data, reg_base + CQSPI_REG_CMDWRITEDATAUPPER); > + } > + } > ret = cqspi_exec_flash_cmd(cqspi, reg); > return ret; > } >
On 21-Jan-19 3:07 PM, Tudor.Ambarus@microchip.com wrote: > Hi, Purna, > > On 12/14/2018 04:15 AM, Purna Chandra Mandal wrote: >> cadence-quadspi controller allows upto eight bytes of data to be transferred >> in software Triggered Instruction generator (STIG) mode of operation. Lower >> 4 bytes are written through writedatalower and upper 4 bytes by >> writedataupper register. > > Is this supported by all versions of the IP? > Yes, it is supported on all versions of IP. >> >> This patch allows all the 8 bytes to be written. >> >> Signed-off-by: Purna Chandra Mandal <purna.chandra.mandal@intel.com> >> --- >> >> drivers/mtd/spi-nor/cadence-quadspi.c | 9 +++++++-- >> 1 file changed, 7 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c >> index 04cedd3a2bf6..990934387fea 100644 >> --- a/drivers/mtd/spi-nor/cadence-quadspi.c >> +++ b/drivers/mtd/spi-nor/cadence-quadspi.c >> @@ -420,7 +420,7 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode, >> unsigned int data; > > I know that this is not your change, but data should be u32 and not unsigned > int. reg too ... probably one should submit a patch to change this, I see that > the same error is done in cqspi_command_read(). ack. will be done in separate patch. > >> int ret; >> >> - if (n_tx > 4 || (n_tx && !txbuf)) { >> + if (n_tx > CQSPI_STIG_DATA_LEN_MAX || (n_tx && !txbuf)) { >> dev_err(nor->dev, >> "Invalid input argument, cmdlen %d txbuf 0x%p\n", >> n_tx, txbuf); >> @@ -435,8 +435,13 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode, >> data = 0;> memcpy(&data, txbuf, n_tx); > > You should limit what is copied in data, similar to what is done in > cqspi_command_read(): > > write_len = (n_tx > 4) ? 4 : n_tx; > memcpy(&data, txbuf, write_len); > txbuf += write_len; ack. > > > >> writel(data, reg_base + CQSPI_REG_CMDWRITEDATALOWER); >> - } >> >> + if (n_tx > 4) { >> + data = 0; > and then: > write_len = n_tx - 4; > memcpy(&data, txbuf, write_len); > ack. > Cheers, > ta > >> + memcpy(&data, txbuf + 4, n_tx - 4); >> + writel(data, reg_base + CQSPI_REG_CMDWRITEDATAUPPER); >> + } >> + } >> ret = cqspi_exec_flash_cmd(cqspi, reg); >> return ret; >> } >>
diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index 04cedd3a2bf6..990934387fea 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -420,7 +420,7 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode, unsigned int data; int ret; - if (n_tx > 4 || (n_tx && !txbuf)) { + if (n_tx > CQSPI_STIG_DATA_LEN_MAX || (n_tx && !txbuf)) { dev_err(nor->dev, "Invalid input argument, cmdlen %d txbuf 0x%p\n", n_tx, txbuf); @@ -435,8 +435,13 @@ static int cqspi_command_write(struct spi_nor *nor, const u8 opcode, data = 0; memcpy(&data, txbuf, n_tx); writel(data, reg_base + CQSPI_REG_CMDWRITEDATALOWER); - } + if (n_tx > 4) { + data = 0; + memcpy(&data, txbuf + 4, n_tx - 4); + writel(data, reg_base + CQSPI_REG_CMDWRITEDATAUPPER); + } + } ret = cqspi_exec_flash_cmd(cqspi, reg); return ret; }
cadence-quadspi controller allows upto eight bytes of data to be transferred in software Triggered Instruction generator (STIG) mode of operation. Lower 4 bytes are written through writedatalower and upper 4 bytes by writedataupper register. This patch allows all the 8 bytes to be written. Signed-off-by: Purna Chandra Mandal <purna.chandra.mandal@intel.com> --- drivers/mtd/spi-nor/cadence-quadspi.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)