| Message ID | 20181213182714.26094-4-geert+renesas@glider.be |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl: sh-pfc: Fix config register descriptions | expand |
On Thu, Dec 13, 2018 at 07:27:02PM +0100, Geert Uytterhoeven wrote: > The Module Select Register 0 contains 20 (= 5 x 4) reserved bits, and 12 > single-bit fields, but the variable field descriptor lacks a field of 4 > reserved bits. > > Fixes: f59125248a691dfe ("pinctrl: sh-pfc: Add R8A77980 PFC support") > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c index 69cc571e00aec6c1..91523a5ed2a89c7d 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c @@ -2822,7 +2822,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { #define F_(x, y) x, #define FM(x) FN_##x, { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32, - 4, 4, 4, 4, + 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) { /* RESERVED 31, 30, 29, 28 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
The Module Select Register 0 contains 20 (= 5 x 4) reserved bits, and 12 single-bit fields, but the variable field descriptor lacks a field of 4 reserved bits. Fixes: f59125248a691dfe ("pinctrl: sh-pfc: Add R8A77980 PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/pinctrl/sh-pfc/pfc-r8a77980.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)