@@ -1606,7 +1606,7 @@
(define_expand "vec_ctd_s64"
[(set (match_operand:V2DF 0 "register_operand" "")
(unspec:V2DF [(match_operand:V2DI 1 "register_operand" "")
- (const_int 4) ; inexact suppressed
+ (const_int VEC_NOINEXACT)
(const_int VEC_RND_CURRENT)]
UNSPEC_VEC_VCDGB))
(use (match_operand:QI 2 "const_int_operand" ""))
@@ -1637,7 +1637,7 @@
(define_expand "vec_ctd_u64"
[(set (match_operand:V2DF 0 "register_operand" "")
(unspec:V2DF [(match_operand:V2DI 1 "register_operand" "")
- (const_int 4) ; inexact suppressed
+ (const_int VEC_NOINEXACT)
(const_int VEC_RND_CURRENT)]
UNSPEC_VEC_VCDLGB))
(use (match_operand:QI 2 "const_int_operand" ""))
@@ -1671,7 +1671,7 @@
(match_dup 3)))
(set (match_operand:V2DI 0 "register_operand" "")
(unspec:V2DI [(match_dup 4)
- (const_int 4) ; inexact suppressed
+ (const_int VEC_NOINEXACT)
(const_int VEC_RND_CURRENT)]
UNSPEC_VEC_VCGDB))]
"TARGET_VX"
@@ -1704,7 +1704,7 @@
(match_dup 3)))
(set (match_operand:V2DI 0 "register_operand" "")
(unspec:V2DI [(match_dup 4)
- (const_int 4) ; inexact suppressed
+ (const_int VEC_NOINEXACT)
(const_int VEC_RND_CURRENT)]
UNSPEC_VEC_VCLGDB))]
"TARGET_VX"
@@ -2025,7 +2025,7 @@
(define_expand "vec_double_s64"
[(set (match_operand:V2DF 0 "register_operand")
(unspec:V2DF [(match_operand:V2DI 1 "register_operand")
- (const_int 0) ; inexact suppression disabled
+ (const_int VEC_INEXACT)
(const_int VEC_RND_CURRENT)]
UNSPEC_VEC_VCDGB))]
"TARGET_VX")
@@ -2033,7 +2033,7 @@
(define_expand "vec_double_u64"
[(set (match_operand:V2DF 0 "register_operand")
(unspec:V2DF [(match_operand:V2DI 1 "register_operand")
- (const_int 0) ; inexact suppression disabled
+ (const_int VEC_INEXACT)
(const_int VEC_RND_CURRENT)]
UNSPEC_VEC_VCDLGB))]
"TARGET_VX")