diff --git a/cpu-all.h b/cpu-all.h
index 880f570..e839100 100644
--- a/cpu-all.h
+++ b/cpu-all.h
@@ -847,7 +847,7 @@ void cpu_reset_interrupt(CPUState *env, int mask);

 void cpu_exit(CPUState *s);

-int qemu_cpu_has_work(CPUState *env);
+bool qemu_cpu_has_work(CPUState *env);

 /* Breakpoint/watchpoint flags */
 #define BP_MEM_READ           0x01
diff --git a/cpu-exec.c b/cpu-exec.c
index fb5ad58..fb423d9 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -33,7 +33,7 @@ int tb_invalidated_flag;

 //#define CONFIG_DEBUG_EXEC

-int qemu_cpu_has_work(CPUState *env)
+bool qemu_cpu_has_work(CPUState *env)
 {
     return cpu_has_work(env);
 }
diff --git a/target-alpha/exec.h b/target-alpha/exec.h
index 7a325e7..0f9b827 100644
--- a/target-alpha/exec.h
+++ b/target-alpha/exec.h
@@ -37,7 +37,7 @@ register struct CPUAlphaState *env asm(AREG0);
 #include "softmmu_exec.h"
 #endif /* !defined(CONFIG_USER_ONLY) */

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
     /* Here we are checking to see if the CPU should wake up from HALT.
        We will have gotten into this state only for WTINT from PALmode.  */
diff --git a/target-arm/exec.h b/target-arm/exec.h
index db6608e..9c31418 100644
--- a/target-arm/exec.h
+++ b/target-arm/exec.h
@@ -24,10 +24,10 @@ register struct CPUARMState *env asm(AREG0);
 #include "cpu.h"
 #include "exec-all.h"

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
-    return (env->interrupt_request &
-            (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB));
+    return env->interrupt_request &
+        (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
 }

 #if !defined(CONFIG_USER_ONLY)
diff --git a/target-cris/exec.h b/target-cris/exec.h
index 2d5d297..70d99d1 100644
--- a/target-cris/exec.h
+++ b/target-cris/exec.h
@@ -28,9 +28,9 @@ register struct CPUCRISState *env asm(AREG0);
 #include "softmmu_exec.h"
 #endif

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
-    return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI));
+    return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
 }

 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
diff --git a/target-i386/exec.h b/target-i386/exec.h
index 5dbee96..77bb356 100644
--- a/target-i386/exec.h
+++ b/target-i386/exec.h
@@ -160,7 +160,7 @@ static inline void load_eflags(int eflags, int update_mask)
         (eflags & update_mask) | 0x2;
 }

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
     return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
             (env->eflags & IF_MASK)) ||
diff --git a/target-lm32/exec.h b/target-lm32/exec.h
index 348b723..83ddb65 100644
--- a/target-lm32/exec.h
+++ b/target-lm32/exec.h
@@ -24,7 +24,7 @@ register struct CPULM32State *env asm(AREG0);
 #include "cpu.h"
 #include "exec-all.h"

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
     return env->interrupt_request & CPU_INTERRUPT_HARD;
 }
diff --git a/target-m68k/exec.h b/target-m68k/exec.h
index 91daa6b..f7abbf4 100644
--- a/target-m68k/exec.h
+++ b/target-m68k/exec.h
@@ -28,9 +28,9 @@ register struct CPUM68KState *env asm(AREG0);
 #include "softmmu_exec.h"
 #endif

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
-    return (env->interrupt_request & (CPU_INTERRUPT_HARD));
+    return env->interrupt_request & (CPU_INTERRUPT_HARD);
 }

 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
diff --git a/target-microblaze/exec.h b/target-microblaze/exec.h
index 1efff30..bb2b7db 100644
--- a/target-microblaze/exec.h
+++ b/target-microblaze/exec.h
@@ -27,9 +27,9 @@ register struct CPUMBState *env asm(AREG0);
 #include "softmmu_exec.h"
 #endif

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
-    return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI));
+    return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
 }

 static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
diff --git a/target-mips/exec.h b/target-mips/exec.h
index 607edf1..e908c3f 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -17,7 +17,7 @@ register struct CPUMIPSState *env asm(AREG0);
 #include "softmmu_exec.h"
 #endif /* !defined(CONFIG_USER_ONLY) */

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
     int has_work = 0;

diff --git a/target-ppc/exec.h b/target-ppc/exec.h
index f87847a..81c3c54 100644
--- a/target-ppc/exec.h
+++ b/target-ppc/exec.h
@@ -32,9 +32,9 @@ register struct CPUPPCState *env asm(AREG0);
 #include "softmmu_exec.h"
 #endif /* !defined(CONFIG_USER_ONLY) */

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
-    return (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD));
+    return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
 }


diff --git a/target-s390x/exec.h b/target-s390x/exec.h
index 7a87fff..9ababe1 100644
--- a/target-s390x/exec.h
+++ b/target-s390x/exec.h
@@ -29,10 +29,10 @@ register struct CPUS390XState *env asm(AREG0);
 #include "softmmu_exec.h"
 #endif /* !defined(CONFIG_USER_ONLY) */

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
-    return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
-            (env->psw.mask & PSW_MASK_EXT));
+    return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+        (env->psw.mask & PSW_MASK_EXT);
 }

 static inline void regs_to_env(void)
diff --git a/target-sh4/exec.h b/target-sh4/exec.h
index 9f1c1f6..ff068c5 100644
--- a/target-sh4/exec.h
+++ b/target-sh4/exec.h
@@ -27,9 +27,9 @@ register struct CPUSH4State *env asm(AREG0);
 #include "cpu.h"
 #include "exec-all.h"

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
-    return (env->interrupt_request & CPU_INTERRUPT_HARD);
+    return env->interrupt_request & CPU_INTERRUPT_HARD;
 }

 #ifndef CONFIG_USER_ONLY
diff --git a/target-sparc/exec.h b/target-sparc/exec.h
index becdaf5..c1ac2fd 100644
--- a/target-sparc/exec.h
+++ b/target-sparc/exec.h
@@ -13,7 +13,7 @@ register struct CPUSPARCState *env asm(AREG0);
 #endif /* !defined(CONFIG_USER_ONLY) */

 /* op_helper.c */
-static inline int cpu_has_work(CPUState *env1)
+static inline bool cpu_has_work(CPUState *env1)
 {
     return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
            cpu_interrupts_enabled(env1);
diff --git a/target-unicore32/exec.h b/target-unicore32/exec.h
index 4ab55f4..ce4132f 100644
--- a/target-unicore32/exec.h
+++ b/target-unicore32/exec.h
@@ -26,7 +26,7 @@ static inline void regs_to_env(void)
 {
 }

-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
 {
     return env->interrupt_request &
         (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
