From patchwork Sun Jun 19 21:00:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 100986 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DA9E1B6FC3 for ; Mon, 20 Jun 2011 07:16:15 +1000 (EST) Received: from localhost ([::1]:45791 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QYPLl-0004jR-7u for incoming@patchwork.ozlabs.org; Sun, 19 Jun 2011 17:16:09 -0400 Received: from eggs.gnu.org ([140.186.70.92]:53493) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QYP6n-0001eq-CW for qemu-devel@nongnu.org; Sun, 19 Jun 2011 17:00:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QYP6k-0007dB-VR for qemu-devel@nongnu.org; Sun, 19 Jun 2011 17:00:41 -0400 Received: from mail-qy0-f173.google.com ([209.85.216.173]:41610) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QYP6k-0007bM-C6 for qemu-devel@nongnu.org; Sun, 19 Jun 2011 17:00:38 -0400 Received: by mail-qy0-f173.google.com with SMTP id 10so1093994qyk.4 for ; Sun, 19 Jun 2011 14:00:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:from:date:message-id:subject:to :content-type; bh=Hgqw9LwaJ7l0JLFRPfdvpiLRocnFoULeU2FPy+ftQkA=; b=grD/2xzI+vgHHFxRc9zz0FNMFfngfz2C1CmSH8CM2D58AGz2k833NRZ+XSSpghED/7 4cOAew34tpZIzZ3hADOxHap4gLac7Zrev9NwqqxXq/Zh9udY6/+/ygNRlcpZzkySIJSz TRdlwOHoLqf5KW/E7dyQNcGVuEfPLctdgMiO4= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=pUPDasWmfVgyC0uaAR8qY2HDCjak3xEfwxiWT3NpHNTuYXxSX0nTyADreZTZ1zmrgL Zcik0p1geYtrLn/97ny/7Y9rFojLlvFkfpc4ldxV/eD5R7RERVngQZj5W/WubLH5AVrQ T+KeYVgKLXo3yrShHHvuh8nRuPnjmbXvvJS4s= Received: by 10.224.211.137 with SMTP id go9mr3181102qab.117.1308517238098; Sun, 19 Jun 2011 14:00:38 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.2.138 with HTTP; Sun, 19 Jun 2011 14:00:18 -0700 (PDT) From: Blue Swirl Date: Mon, 20 Jun 2011 00:00:18 +0300 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.216.173 Subject: [Qemu-devel] [PATCH 7/9] exec.h: fix coding style and change cpu_has_work to return bool X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Before the next patch, fix coding style of the areas affected. Change the type of the return value from cpu_has_work() and qemu_cpu_has_work() to bool. Signed-off-by: Blue Swirl --- cpu-all.h | 2 +- cpu-exec.c | 2 +- target-alpha/exec.h | 2 +- target-arm/exec.h | 6 +++--- target-cris/exec.h | 4 ++-- target-i386/exec.h | 2 +- target-lm32/exec.h | 2 +- target-m68k/exec.h | 4 ++-- target-microblaze/exec.h | 4 ++-- target-mips/exec.h | 2 +- target-ppc/exec.h | 4 ++-- target-s390x/exec.h | 6 +++--- target-sh4/exec.h | 4 ++-- target-sparc/exec.h | 2 +- target-unicore32/exec.h | 2 +- 15 files changed, 24 insertions(+), 24 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index 880f570..e839100 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -847,7 +847,7 @@ void cpu_reset_interrupt(CPUState *env, int mask); void cpu_exit(CPUState *s); -int qemu_cpu_has_work(CPUState *env); +bool qemu_cpu_has_work(CPUState *env); /* Breakpoint/watchpoint flags */ #define BP_MEM_READ 0x01 diff --git a/cpu-exec.c b/cpu-exec.c index fb5ad58..fb423d9 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -33,7 +33,7 @@ int tb_invalidated_flag; //#define CONFIG_DEBUG_EXEC -int qemu_cpu_has_work(CPUState *env) +bool qemu_cpu_has_work(CPUState *env) { return cpu_has_work(env); } diff --git a/target-alpha/exec.h b/target-alpha/exec.h index 7a325e7..0f9b827 100644 --- a/target-alpha/exec.h +++ b/target-alpha/exec.h @@ -37,7 +37,7 @@ register struct CPUAlphaState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { /* Here we are checking to see if the CPU should wake up from HALT. We will have gotten into this state only for WTINT from PALmode. */ diff --git a/target-arm/exec.h b/target-arm/exec.h index db6608e..9c31418 100644 --- a/target-arm/exec.h +++ b/target-arm/exec.h @@ -24,10 +24,10 @@ register struct CPUARMState *env asm(AREG0); #include "cpu.h" #include "exec-all.h" -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { - return (env->interrupt_request & - (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)); + return env->interrupt_request & + (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB); } #if !defined(CONFIG_USER_ONLY) diff --git a/target-cris/exec.h b/target-cris/exec.h index 2d5d297..70d99d1 100644 --- a/target-cris/exec.h +++ b/target-cris/exec.h @@ -28,9 +28,9 @@ register struct CPUCRISState *env asm(AREG0); #include "softmmu_exec.h" #endif -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { - return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI)); + return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) diff --git a/target-i386/exec.h b/target-i386/exec.h index 5dbee96..77bb356 100644 --- a/target-i386/exec.h +++ b/target-i386/exec.h @@ -160,7 +160,7 @@ static inline void load_eflags(int eflags, int update_mask) (eflags & update_mask) | 0x2; } -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { return ((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || diff --git a/target-lm32/exec.h b/target-lm32/exec.h index 348b723..83ddb65 100644 --- a/target-lm32/exec.h +++ b/target-lm32/exec.h @@ -24,7 +24,7 @@ register struct CPULM32State *env asm(AREG0); #include "cpu.h" #include "exec-all.h" -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { return env->interrupt_request & CPU_INTERRUPT_HARD; } diff --git a/target-m68k/exec.h b/target-m68k/exec.h index 91daa6b..f7abbf4 100644 --- a/target-m68k/exec.h +++ b/target-m68k/exec.h @@ -28,9 +28,9 @@ register struct CPUM68KState *env asm(AREG0); #include "softmmu_exec.h" #endif -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { - return (env->interrupt_request & (CPU_INTERRUPT_HARD)); + return env->interrupt_request & (CPU_INTERRUPT_HARD); } static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) diff --git a/target-microblaze/exec.h b/target-microblaze/exec.h index 1efff30..bb2b7db 100644 --- a/target-microblaze/exec.h +++ b/target-microblaze/exec.h @@ -27,9 +27,9 @@ register struct CPUMBState *env asm(AREG0); #include "softmmu_exec.h" #endif -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { - return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI)); + return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) diff --git a/target-mips/exec.h b/target-mips/exec.h index 607edf1..e908c3f 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -17,7 +17,7 @@ register struct CPUMIPSState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { int has_work = 0; diff --git a/target-ppc/exec.h b/target-ppc/exec.h index f87847a..81c3c54 100644 --- a/target-ppc/exec.h +++ b/target-ppc/exec.h @@ -32,9 +32,9 @@ register struct CPUPPCState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { - return (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)); + return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD); } diff --git a/target-s390x/exec.h b/target-s390x/exec.h index 7a87fff..9ababe1 100644 --- a/target-s390x/exec.h +++ b/target-s390x/exec.h @@ -29,10 +29,10 @@ register struct CPUS390XState *env asm(AREG0); #include "softmmu_exec.h" #endif /* !defined(CONFIG_USER_ONLY) */ -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { - return ((env->interrupt_request & CPU_INTERRUPT_HARD) && - (env->psw.mask & PSW_MASK_EXT)); + return (env->interrupt_request & CPU_INTERRUPT_HARD) && + (env->psw.mask & PSW_MASK_EXT); } static inline void regs_to_env(void) diff --git a/target-sh4/exec.h b/target-sh4/exec.h index 9f1c1f6..ff068c5 100644 --- a/target-sh4/exec.h +++ b/target-sh4/exec.h @@ -27,9 +27,9 @@ register struct CPUSH4State *env asm(AREG0); #include "cpu.h" #include "exec-all.h" -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { - return (env->interrupt_request & CPU_INTERRUPT_HARD); + return env->interrupt_request & CPU_INTERRUPT_HARD; } #ifndef CONFIG_USER_ONLY diff --git a/target-sparc/exec.h b/target-sparc/exec.h index becdaf5..c1ac2fd 100644 --- a/target-sparc/exec.h +++ b/target-sparc/exec.h @@ -13,7 +13,7 @@ register struct CPUSPARCState *env asm(AREG0); #endif /* !defined(CONFIG_USER_ONLY) */ /* op_helper.c */ -static inline int cpu_has_work(CPUState *env1) +static inline bool cpu_has_work(CPUState *env1) { return (env1->interrupt_request & CPU_INTERRUPT_HARD) && cpu_interrupts_enabled(env1); diff --git a/target-unicore32/exec.h b/target-unicore32/exec.h index 4ab55f4..ce4132f 100644 --- a/target-unicore32/exec.h +++ b/target-unicore32/exec.h @@ -26,7 +26,7 @@ static inline void regs_to_env(void) { } -static inline int cpu_has_work(CPUState *env) +static inline bool cpu_has_work(CPUState *env) { return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);