Comments
Patch
@@ -847,7 +847,7 @@ void cpu_reset_interrupt(CPUState *env, int mask);
void cpu_exit(CPUState *s);
-int qemu_cpu_has_work(CPUState *env);
+bool qemu_cpu_has_work(CPUState *env);
/* Breakpoint/watchpoint flags */
#define BP_MEM_READ 0x01
@@ -33,7 +33,7 @@ int tb_invalidated_flag;
//#define CONFIG_DEBUG_EXEC
-int qemu_cpu_has_work(CPUState *env)
+bool qemu_cpu_has_work(CPUState *env)
{
return cpu_has_work(env);
}
@@ -37,7 +37,7 @@ register struct CPUAlphaState *env asm(AREG0);
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
/* Here we are checking to see if the CPU should wake up from HALT.
We will have gotten into this state only for WTINT from PALmode. */
@@ -24,10 +24,10 @@ register struct CPUARMState *env asm(AREG0);
#include "cpu.h"
#include "exec-all.h"
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
- return (env->interrupt_request &
- (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB));
+ return env->interrupt_request &
+ (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
}
#if !defined(CONFIG_USER_ONLY)
@@ -28,9 +28,9 @@ register struct CPUCRISState *env asm(AREG0);
#include "softmmu_exec.h"
#endif
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
- return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI));
+ return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
@@ -160,7 +160,7 @@ static inline void load_eflags(int eflags, int update_mask)
(eflags & update_mask) | 0x2;
}
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
(env->eflags & IF_MASK)) ||
@@ -24,7 +24,7 @@ register struct CPULM32State *env asm(AREG0);
#include "cpu.h"
#include "exec-all.h"
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
return env->interrupt_request & CPU_INTERRUPT_HARD;
}
@@ -28,9 +28,9 @@ register struct CPUM68KState *env asm(AREG0);
#include "softmmu_exec.h"
#endif
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
- return (env->interrupt_request & (CPU_INTERRUPT_HARD));
+ return env->interrupt_request & (CPU_INTERRUPT_HARD);
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
@@ -27,9 +27,9 @@ register struct CPUMBState *env asm(AREG0);
#include "softmmu_exec.h"
#endif
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
- return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI));
+ return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
@@ -17,7 +17,7 @@ register struct CPUMIPSState *env asm(AREG0);
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
int has_work = 0;
@@ -32,9 +32,9 @@ register struct CPUPPCState *env asm(AREG0);
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
- return (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD));
+ return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
}
@@ -29,10 +29,10 @@ register struct CPUS390XState *env asm(AREG0);
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
- return ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
- (env->psw.mask & PSW_MASK_EXT));
+ return (env->interrupt_request & CPU_INTERRUPT_HARD) &&
+ (env->psw.mask & PSW_MASK_EXT);
}
static inline void regs_to_env(void)
@@ -27,9 +27,9 @@ register struct CPUSH4State *env asm(AREG0);
#include "cpu.h"
#include "exec-all.h"
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
- return (env->interrupt_request & CPU_INTERRUPT_HARD);
+ return env->interrupt_request & CPU_INTERRUPT_HARD;
}
#ifndef CONFIG_USER_ONLY
@@ -13,7 +13,7 @@ register struct CPUSPARCState *env asm(AREG0);
#endif /* !defined(CONFIG_USER_ONLY) */
/* op_helper.c */
-static inline int cpu_has_work(CPUState *env1)
+static inline bool cpu_has_work(CPUState *env1)
{
return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
cpu_interrupts_enabled(env1);
@@ -26,7 +26,7 @@ static inline void regs_to_env(void)
{
}
-static inline int cpu_has_work(CPUState *env)
+static inline bool cpu_has_work(CPUState *env)
{
return env->interrupt_request &
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB);
Before the next patch, fix coding style of the areas affected. Change the type of the return value from cpu_has_work() and qemu_cpu_has_work() to bool. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> --- cpu-all.h | 2 +- cpu-exec.c | 2 +- target-alpha/exec.h | 2 +- target-arm/exec.h | 6 +++--- target-cris/exec.h | 4 ++-- target-i386/exec.h | 2 +- target-lm32/exec.h | 2 +- target-m68k/exec.h | 4 ++-- target-microblaze/exec.h | 4 ++-- target-mips/exec.h | 2 +- target-ppc/exec.h | 4 ++-- target-s390x/exec.h | 6 +++--- target-sh4/exec.h | 4 ++-- target-sparc/exec.h | 2 +- target-unicore32/exec.h | 2 +- 15 files changed, 24 insertions(+), 24 deletions(-)