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[GIT,PULL] Allwinner clock changes for 4.21

Message ID 20181207150158.vvfpjcxjikjjyj5m@flea
State New
Headers show
Series [GIT,PULL] Allwinner clock changes for 4.21 | expand

Pull-request

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git tags/sunxi-clk-for-4.21

Message

Maxime Ripard Dec. 7, 2018, 3:01 p.m. UTC 
Hi Mike, Stephen,

Please pull our usual changes for the next merge window.

Thanks!
Maxime

The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:

  Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git tags/sunxi-clk-for-4.21

for you to fetch changes up to 6e6da2039c82271dd873b9ad2b902a692a7dd554:

  clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks (2018-12-05 12:08:20 +0100)

----------------------------------------------------------------
Allwinner clock changes for 4.21

Our usual clock driver changes for 4.21. The major patches in that pull
request are:
  - Sigma Delta modulation for the A33 audio clocks
  - Support for the F1c100s SoC
  - Rework of the oscillator tree
  - H6 display engine clocks

----------------------------------------------------------------
Chen-Yu Tsai (5):
      clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL
      clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output
      clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent
      clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL
      clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks

Icenowy Zheng (1):
      clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock

Jagan Teki (3):
      clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width
      clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I
      clk: sunxi-ng: a64: Fix gate bit of DSI DPHY

Jernej Skrabec (6):
      clk: sunxi-ng: Adjust MP clock parent rate when allowed
      clk: sunxi-ng: Use u64 for calculation of NM rate
      clk: sunxi-ng: h6: Set video PLLs limits
      dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description
      clk: sunxi-ng: Add support for H6 DE3 clocks
      clk: sunxi-ng: h3: Allow parent change for ve clock

Mesih Kilinc (2):
      dt-bindings: clock: Add Allwinner suniv F1C100s CCU
      clk: sunxi-ng: add support for suniv F1C100s SoC

 .../devicetree/bindings/clock/sun8i-de2.txt        |   5 +-
 .../devicetree/bindings/clock/sunxi-ccu.txt        |   1 +
 drivers/clk/sunxi-ng/Kconfig                       |   6 +
 drivers/clk/sunxi-ng/Makefile                      |   1 +
 drivers/clk/sunxi-ng/ccu-sun50i-a64.c              |  46 +-
 drivers/clk/sunxi-ng/ccu-sun50i-h6.c               |  10 +-
 drivers/clk/sunxi-ng/ccu-sun8i-a33.c               |  43 +-
 drivers/clk/sunxi-ng/ccu-sun8i-de2.c               |  71 ++-
 drivers/clk/sunxi-ng/ccu-sun8i-de2.h               |   4 +-
 drivers/clk/sunxi-ng/ccu-sun8i-h3.c                |   4 +-
 drivers/clk/sunxi-ng/ccu-sun8i-r40.c               |  11 +
 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c           | 541 +++++++++++++++++++++
 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.h           |  34 ++
 drivers/clk/sunxi-ng/ccu_mp.c                      |  64 ++-
 drivers/clk/sunxi-ng/ccu_nm.c                      |  18 +-
 include/dt-bindings/clock/sun8i-de2.h              |   3 +
 include/dt-bindings/clock/suniv-ccu-f1c100s.h      |  70 +++
 include/dt-bindings/reset/sun8i-de2.h              |   1 +
 include/dt-bindings/reset/suniv-ccu-f1c100s.h      |  38 ++
 19 files changed, 924 insertions(+), 47 deletions(-)
 create mode 100644 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c
 create mode 100644 drivers/clk/sunxi-ng/ccu-suniv-f1c100s.h
 create mode 100644 include/dt-bindings/clock/suniv-ccu-f1c100s.h
 create mode 100644 include/dt-bindings/reset/suniv-ccu-f1c100s.h

Comments

Stephen Boyd Dec. 7, 2018, 8:41 p.m. UTC | #1 
Quoting Maxime Ripard (2018-12-07 07:01:58)
> Hi Mike, Stephen,
> 
> Please pull our usual changes for the next merge window.
> 
> Thanks!
> Maxime
> 
> The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:
> 
>   Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)
> 
> are available in the Git repository at:
> 
>   https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git tags/sunxi-clk-for-4.21
> 
> for you to fetch changes up to 6e6da2039c82271dd873b9ad2b902a692a7dd554:
> 
>   clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks (2018-12-05 12:08:20 +0100)
> 

Thanks. Pulled into clk-next.