[U-Boot,v2,16/20] riscv: Do some basic architecture level cpu initialization

Message ID 1544192072-28764-17-git-send-email-bmeng.cn@gmail.com
State Superseded
Delegated to: Andes
Headers show
Series
  • riscv: Adding RISC-V CPU and timer driver
Related show

Commit Message

Bin Meng Dec. 7, 2018, 2:14 p.m.
Implement arch_cpu_init() to do some basic architecture level cpu
initialization, like FPU enable, etc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- use csr_set() to set MSTATUS_FS
- only enabling the cycle, time, and instret counters
- change to use satp

 arch/riscv/cpu/cpu.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Comments

Auer, Lukas Dec. 11, 2018, 12:01 a.m. | #1
Hi Bin,

On Fri, 2018-12-07 at 06:14 -0800, Bin Meng wrote:
> Implement arch_cpu_init() to do some basic architecture level cpu
> initialization, like FPU enable, etc.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> 
> ---
> 
> Changes in v2:
> - use csr_set() to set MSTATUS_FS
> - only enabling the cycle, time, and instret counters
> - change to use satp
> 
>  arch/riscv/cpu/cpu.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> index 3858e51..194799c 100644
> --- a/arch/riscv/cpu/cpu.c
> +++ b/arch/riscv/cpu/cpu.c
> @@ -7,6 +7,7 @@
>  #include <cpu.h>
>  #include <log.h>
>  #include <asm/csr.h>
> +#include <asm/encoding.h>
>  
>  /*
>   * prior_stage_fdt_address must be stored in the data section since
> it is used
> @@ -67,3 +68,21 @@ int arch_early_init_r(void)
>  
>  	return 0;
>  }
> +
> +int arch_cpu_init(void)
> +{
> +	/* Enable FPU */
> +	if (supports_extension('d') || supports_extension('f')) {

supports_extension does not work when running in supervisor mode
(unless BBL is patched). Can we maybe use the CPU driver here?

> +		csr_set(MODE_PREFIX(status), MSTATUS_FS);
> +		csr_write(fcsr, 0);
> +	}
> +
> +	/* Enable perf counters for cycle, time, and instret counters
> only */
> +	csr_write(MODE_PREFIX(counteren), GENMASK(2, 0));

I would tend to only enable this in mcounteren, so for the supervisor-
mode. Linux can still enable the counters for user-mode if required.

> +
> +	/* Disable paging */
> +	if (supports_extension('s'))
> +		csr_write(satp, 0);

This should only be done, when running in machine mode. In supervisor
mode this would cause issues if we have something other than an
identity-mapping or paging disabled.

Thanks,
Lukas

> +
> +	return 0;
> +}
Bin Meng Dec. 11, 2018, 1:49 a.m. | #2
Hi Lukas,

On Tue, Dec 11, 2018 at 8:01 AM Auer, Lukas
<lukas.auer@aisec.fraunhofer.de> wrote:
>
> Hi Bin,
>
> On Fri, 2018-12-07 at 06:14 -0800, Bin Meng wrote:
> > Implement arch_cpu_init() to do some basic architecture level cpu
> > initialization, like FPU enable, etc.
> >
> > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> >
> > ---
> >
> > Changes in v2:
> > - use csr_set() to set MSTATUS_FS
> > - only enabling the cycle, time, and instret counters
> > - change to use satp
> >
> >  arch/riscv/cpu/cpu.c | 19 +++++++++++++++++++
> >  1 file changed, 19 insertions(+)
> >
> > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> > index 3858e51..194799c 100644
> > --- a/arch/riscv/cpu/cpu.c
> > +++ b/arch/riscv/cpu/cpu.c
> > @@ -7,6 +7,7 @@
> >  #include <cpu.h>
> >  #include <log.h>
> >  #include <asm/csr.h>
> > +#include <asm/encoding.h>
> >
> >  /*
> >   * prior_stage_fdt_address must be stored in the data section since
> > it is used
> > @@ -67,3 +68,21 @@ int arch_early_init_r(void)
> >
> >       return 0;
> >  }
> > +
> > +int arch_cpu_init(void)
> > +{
> > +     /* Enable FPU */
> > +     if (supports_extension('d') || supports_extension('f')) {
>
> supports_extension does not work when running in supervisor mode
> (unless BBL is patched). Can we maybe use the CPU driver here?
>

Yes, I think so. Will change to use info provided by the CPU driver in v3.

> > +             csr_set(MODE_PREFIX(status), MSTATUS_FS);
> > +             csr_write(fcsr, 0);
> > +     }
> > +
> > +     /* Enable perf counters for cycle, time, and instret counters
> > only */
> > +     csr_write(MODE_PREFIX(counteren), GENMASK(2, 0));
>
> I would tend to only enable this in mcounteren, so for the supervisor-
> mode. Linux can still enable the counters for user-mode if required.
>

OK.

> > +
> > +     /* Disable paging */
> > +     if (supports_extension('s'))
> > +             csr_write(satp, 0);
>
> This should only be done, when running in machine mode. In supervisor
> mode this would cause issues if we have something other than an
> identity-mapping or paging disabled.
>

I doubt we want to enable paging for S-mode U-Boot, but I am OK to do
such in M-mode only.

Regards,
Bin

Patch

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 3858e51..194799c 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -7,6 +7,7 @@ 
 #include <cpu.h>
 #include <log.h>
 #include <asm/csr.h>
+#include <asm/encoding.h>
 
 /*
  * prior_stage_fdt_address must be stored in the data section since it is used
@@ -67,3 +68,21 @@  int arch_early_init_r(void)
 
 	return 0;
 }
+
+int arch_cpu_init(void)
+{
+	/* Enable FPU */
+	if (supports_extension('d') || supports_extension('f')) {
+		csr_set(MODE_PREFIX(status), MSTATUS_FS);
+		csr_write(fcsr, 0);
+	}
+
+	/* Enable perf counters for cycle, time, and instret counters only */
+	csr_write(MODE_PREFIX(counteren), GENMASK(2, 0));
+
+	/* Disable paging */
+	if (supports_extension('s'))
+		csr_write(satp, 0);
+
+	return 0;
+}