@@ -65,6 +65,7 @@ void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt,
uint32_t phandle);
void spapr_xive_reset_tctx(sPAPRXive *xive);
void spapr_xive_map_mmio(sPAPRXive *xive);
+void spapr_xive_enable_mmio(sPAPRXive *xive, bool enable);
/*
* KVM XIVE device helpers
@@ -196,6 +196,15 @@ void spapr_xive_map_mmio(sPAPRXive *xive)
sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base);
}
+void spapr_xive_enable_mmio(sPAPRXive *xive, bool enable)
+{
+ memory_region_set_enabled(&xive->source.esb_mmio, enable);
+ memory_region_set_enabled(&xive->tm_mmio, enable);
+
+ /* Disable the END ESBs until a guest OS makes use of them */
+ memory_region_set_enabled(&xive->end_source.esb_mmio, false);
+}
+
/*
* When a Virtual Processor is scheduled to run on a HW thread, the
* hypervisor pushes its identifier in the OS CAM line. Emulate the
@@ -216,6 +216,11 @@ static void spapr_irq_reset_xics(sPAPRMachineState *spapr, Error **errp)
CPU_FOREACH(cs) {
spapr_cpu_core_set_intc(POWERPC_CPU(cs), spapr->icp_type);
}
+
+ /* Deactivate the XIVE MMIOs */
+ if (spapr->xive) {
+ spapr_xive_enable_mmio(spapr->xive, false);
+ }
}
#define SPAPR_IRQ_XICS_NR_IRQS 0x1000
@@ -365,6 +370,9 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spapr, Error **errp)
* to come after the XiveTCTX reset handlers.
*/
spapr_xive_reset_tctx(spapr->xive);
+
+ /* Activate the XIVE MMIOs */
+ spapr_xive_enable_mmio(spapr->xive, true);
}
/*
Depending on the interrupt mode chosen, enable or disable the XIVE MMIOs. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- include/hw/ppc/spapr_xive.h | 1 + hw/intc/spapr_xive.c | 9 +++++++++ hw/ppc/spapr_irq.c | 8 ++++++++ 3 files changed, 18 insertions(+)