diff mbox series

[1/2] pinctrl: cherryview: Add chv_gpio_clear_triggering() helper function

Message ID 20181204194247.671-1-hdegoede@redhat.com
State New
Headers show
Series [1/2] pinctrl: cherryview: Add chv_gpio_clear_triggering() helper function | expand

Commit Message

Hans de Goede Dec. 4, 2018, 7:42 p.m. UTC
This is a preparation patch for clearing the interrupt trigger from
chv_gpio_disable_free().

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/pinctrl/intel/pinctrl-cherryview.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

Comments

Mika Westerberg Dec. 5, 2018, 11:41 a.m. UTC | #1
On Tue, Dec 04, 2018 at 08:42:46PM +0100, Hans de Goede wrote:
> This is a preparation patch for clearing the interrupt trigger from
> chv_gpio_disable_free().
> 
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Linus Walleij Dec. 5, 2018, 11:52 a.m. UTC | #2
On Tue, Dec 4, 2018 at 8:42 PM Hans de Goede <hdegoede@redhat.com> wrote:

> This is a preparation patch for clearing the interrupt trigger from
> chv_gpio_disable_free().
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Looks good to me, I expect Andy to queue this patch.

Yours,
Linus Walleij
Andy Shevchenko Dec. 5, 2018, 1:50 p.m. UTC | #3
On Wed, Dec 05, 2018 at 12:52:40PM +0100, Linus Walleij wrote:
> On Tue, Dec 4, 2018 at 8:42 PM Hans de Goede <hdegoede@redhat.com> wrote:
> 
> > This is a preparation patch for clearing the interrupt trigger from
> > chv_gpio_disable_free().
> >
> > Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> 
> Looks good to me, I expect Andy to queue this patch.

Pushed to my review and testing queue with Mika's ACK:s, thanks!
diff mbox series

Patch

diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
index 9b0f4b9ef482..4ff7d60a2bf1 100644
--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -846,6 +846,19 @@  static int chv_pinmux_set_mux(struct pinctrl_dev *pctldev,
 	return 0;
 }
 
+static void chv_gpio_clear_triggering(struct chv_pinctrl *pctrl,
+				      unsigned int offset)
+{
+	void __iomem *reg;
+	u32 value;
+
+	reg = chv_padreg(pctrl, offset, CHV_PADCTRL1);
+	value = readl(reg);
+	value &= ~CHV_PADCTRL1_INTWAKECFG_MASK;
+	value &= ~CHV_PADCTRL1_INVRXTX_MASK;
+	chv_writel(value, reg);
+}
+
 static int chv_gpio_request_enable(struct pinctrl_dev *pctldev,
 				   struct pinctrl_gpio_range *range,
 				   unsigned int offset)
@@ -876,11 +889,7 @@  static int chv_gpio_request_enable(struct pinctrl_dev *pctldev,
 		}
 
 		/* Disable interrupt generation */
-		reg = chv_padreg(pctrl, offset, CHV_PADCTRL1);
-		value = readl(reg);
-		value &= ~CHV_PADCTRL1_INTWAKECFG_MASK;
-		value &= ~CHV_PADCTRL1_INVRXTX_MASK;
-		chv_writel(value, reg);
+		chv_gpio_clear_triggering(pctrl, offset);
 
 		reg = chv_padreg(pctrl, offset, CHV_PADCTRL0);
 		value = readl(reg);