| Message ID | CAFULd4bLvdUDV=_wyVuYn6ghn2NASdE6rZmQ3gDFxDXSXKyubA@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [i386] : Correct vec_concatv2df alternative | expand |
On Mon, Dec 03, 2018 at 09:47:48PM +0100, Uros Bizjak wrote: > All avx512f registers support DFmode. > > 2018-12-03 Uros Bizjak <ubizjak@gmail.com> > > * config/i386/sse.md (vec_concatv2df): Change (v,xm,C) > alternative to (v,vm,c). > > Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. > > Committed to mainline SVN. Thanks for doing that. > Index: config/i386/sse.md > =================================================================== > --- config/i386/sse.md (revision 266745) > +++ config/i386/sse.md (working copy) > @@ -9526,7 +9526,7 @@ > (define_insn "vec_concatv2df" > [(set (match_operand:V2DF 0 "register_operand" "=x,x,v,x,v,x,x, v,x,x") > (vec_concat:V2DF > - (match_operand:DF 1 "nonimmediate_operand" " 0,x,v,m,m,0,x,xm,0,0") > + (match_operand:DF 1 "nonimmediate_operand" " 0,x,v,m,m,0,x,vm,0,0") > (match_operand:DF 2 "nonimm_or_0_operand" " x,x,v,1,1,m,m, C,x,m")))] > "TARGET_SSE > && (!(MEM_P (operands[1]) && MEM_P (operands[2])) Jakub
Index: config/i386/sse.md =================================================================== --- config/i386/sse.md (revision 266745) +++ config/i386/sse.md (working copy) @@ -9526,7 +9526,7 @@ (define_insn "vec_concatv2df" [(set (match_operand:V2DF 0 "register_operand" "=x,x,v,x,v,x,x, v,x,x") (vec_concat:V2DF - (match_operand:DF 1 "nonimmediate_operand" " 0,x,v,m,m,0,x,xm,0,0") + (match_operand:DF 1 "nonimmediate_operand" " 0,x,v,m,m,0,x,vm,0,0") (match_operand:DF 2 "nonimm_or_0_operand" " x,x,v,1,1,m,m, C,x,m")))] "TARGET_SSE && (!(MEM_P (operands[1]) && MEM_P (operands[2]))
All avx512f registers support DFmode. 2018-12-03 Uros Bizjak <ubizjak@gmail.com> * config/i386/sse.md (vec_concatv2df): Change (v,xm,C) alternative to (v,vm,c). Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros.