diff mbox series

[U-Boot,v1,1/2] armv8: dts: fsl-lx2160a: add sata node support

Message ID 20181130034447.26269-1-peng.ma@nxp.com
State Accepted
Delegated to: Prabhakar Kushwaha
Headers show
Series [U-Boot,v1,1/2] armv8: dts: fsl-lx2160a: add sata node support | expand

Commit Message

Peng Ma Nov. 30, 2018, 3:44 a.m. UTC
One lx2160A, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
Depends on:
	- https://patchwork.ozlabs.org/project/uboot/list/?series=72964 
	- https://patchwork.ozlabs.org/project/uboot/list/?series=78759

 arch/arm/dts/fsl-lx2160a-rdb.dts |   16 ++++++++++++++++
 arch/arm/dts/fsl-lx2160a.dtsi    |   37 +++++++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+), 0 deletions(-)

Comments

Prabhakar Kushwaha Feb. 20, 2019, 7:43 a.m. UTC | #1
> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Peng Ma
> Sent: Friday, November 30, 2018 9:15 AM
> To: York Sun <york.sun@nxp.com>
> Cc: Xiaowei Bao <xiaowei.bao@nxp.com>; Priyanka Jain
> <priyanka.jain@nxp.com>; Z.q. Hou <zhiqiang.hou@nxp.com>; Peng Ma
> <peng.ma@nxp.com>; u-boot@lists.denx.de; Rajat Srivastava
> <rajat.srivastava@nxp.com>; Yinbo Zhu <yinbo.zhu@nxp.com>
> Subject: [U-Boot] [v1 1/2] armv8: dts: fsl-lx2160a: add sata node support
> 
> One lx2160A, there is one SATA 3.0 advanced host controller interface which
> is a high-performance SATA solution that delivers comprehensive and fully-
> compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA capabilities, in
> accordance with the serial ATA revision 3.0 of Serial ATA International
> Organization.
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> ---

Squashed with lx2rdb board and applied to fsl-qoriq master, awaiting upstream.

--pk
diff mbox series

Patch

diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
index c3b3a06..7c4f0e7 100644
--- a/arch/arm/dts/fsl-lx2160a-rdb.dts
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -53,3 +53,19 @@ 
 &esdhc1 {
 	status = "okay";
 };
+
+&sata0 {
+	status = "okay";
+};
+
+&sata1 {
+	status = "okay";
+};
+
+&sata2 {
+	status = "okay";
+};
+
+&sata3 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index c268bd9..c8cab6a 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -238,4 +238,41 @@ 
 		bus-range = <0x0 0xff>;
 		ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};
+
+	sata0: sata@3200000 {
+			compatible = "fsl,ls2080a-ahci";
+			reg = <0x0 0x3200000 0x0 0x10000>;
+			interrupts = <0 133 4>;
+			clocks = <&clockgen 4 3>;
+			status = "disabled";
+
+	};
+
+	sata1: sata@3210000 {
+			compatible = "fsl,ls2080a-ahci";
+			reg = <0x0 0x3210000 0x0 0x10000>;
+			interrupts = <0 136 4>;
+			clocks = <&clockgen 4 3>;
+			status = "disabled";
+
+	};
+
+	sata2: sata@3220000 {
+			compatible = "fsl,ls2080a-ahci";
+			reg = <0x0 0x3220000 0x0 0x10000>;
+			interrupts = <0 97 4>;
+			clocks = <&clockgen 4 3>;
+			status = "disabled";
+
+	};
+
+	sata3: sata@3230000 {
+			compatible = "fsl,ls2080a-ahci";
+			reg = <0x0 0x3230000 0x0 0x10000>;
+			interrupts = <0 100 4>;
+			clocks = <&clockgen 4 3>;
+			status = "disabled";
+
+	};
+
 };