From patchwork Wed Nov 28 11:02:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasant Hegde X-Patchwork-Id: 1004441 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 434dH071rNz9ryk for ; Wed, 28 Nov 2018 22:10:20 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 434dH05ngnzDqfZ for ; Wed, 28 Nov 2018 22:10:20 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=hegdevasant@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 434d7g2xcRzDqgL for ; Wed, 28 Nov 2018 22:03:59 +1100 (AEDT) Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id wASAxMnF088344 for ; Wed, 28 Nov 2018 06:03:57 -0500 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2p1nvwhq0w-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 28 Nov 2018 06:03:57 -0500 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 28 Nov 2018 11:03:52 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id wASB3pvC8782256 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Nov 2018 11:03:52 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CFBFCA4053; Wed, 28 Nov 2018 11:03:51 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CF619A4059; Wed, 28 Nov 2018 11:03:49 +0000 (GMT) Received: from hegdevasant.in.ibm.com (unknown [9.109.198.143]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 28 Nov 2018 11:03:49 +0000 (GMT) From: Vasant Hegde To: skiboot@lists.ozlabs.org Date: Wed, 28 Nov 2018 16:32:43 +0530 X-Mailer: git-send-email 2.14.3 In-Reply-To: <20181128110244.17664-1-hegdevasant@linux.vnet.ibm.com> References: <20181128110244.17664-1-hegdevasant@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18112811-0012-0000-0000-000002D16D82 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18112811-0013-0000-0000-00002106B1FF Message-Id: <20181128110244.17664-22-hegdevasant@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-11-28_07:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1811280100 Subject: [Skiboot] [PATCH v6 21/22] hdata: Add architected register details to device tree X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stewart@linux.vnet.ibm.com, hbathini@linux.vnet.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Post MPIPL FSP/hostboot passes architected register data via HDAT. Add support to get architected register data from HDAT and pass it to kernel. Kernel will use this data to generate vmcore and opalcore. Device tree properties under /ibm,opal/dump node: cpu-data-version - Architected register data format version cpu-data-size - Per CPU register data size result-table - Add entry for architected register Based on cpu-data-size and result-table, kernel will be able to get data for indivisual CPU/register. Signed-off-by: Vasant Hegde --- hdata/spira.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 47 insertions(+), 2 deletions(-) diff --git a/hdata/spira.c b/hdata/spira.c index 01f77f9b2..f70f095da 100644 --- a/hdata/spira.c +++ b/hdata/spira.c @@ -1047,6 +1047,44 @@ static void dt_init_secureboot_node(const struct iplparams_sysparams *sysparams) dt_add_property_cells(node, "hw-key-hash-size", hw_key_hash_size); } +/* Map architected register data to result-table */ +static int fadump_add_arch_regs(struct dt_node *dump_node, + struct fadump *result_table, int *res_table_cnt) +{ + const struct spira_ntuple *ntuple_proc_dump; + const struct proc_dump_area *arch_regs; + struct fadump_section *fadump_section; + + ntuple_proc_dump = &spira.ntuples.proc_dump_area; + arch_regs = (void *)ntuple_proc_dump->addr; + + if (arch_regs->dest_addr == 0 || arch_regs->act_size <= 0) { + prlog(PR_ERR, + "FADUMP: Architected register data is missing\n"); + return OPAL_HARDWARE; + } + + if (arch_regs->thread_size <= 0) { + prlog(PR_ERR, + "FADUMP: Invalid architected register thread size\n"); + return OPAL_HARDWARE; + } + + /* Add each thread size to device tree */ + dt_add_property_cells(dump_node, + "cpu-data-size", arch_regs->thread_size); + + fadump_section = &(result_table->section[*res_table_cnt]); + fadump_section->source_type = DUMP_REGION_CPU_DATA; + fadump_section->source_addr = arch_regs->dest_addr & ~(HRMOR_BIT); + fadump_section->dest_addr = arch_regs->dest_addr & ~(HRMOR_BIT); + fadump_section->source_size = arch_regs->act_size; + fadump_section->dest_size = arch_regs->act_size; + (*res_table_cnt)++; + + return OPAL_SUCCESS; +} + static void fadump_add_result_table(const struct iplparams_iplparams *p) { int i, j = 0; @@ -1087,9 +1125,9 @@ static void fadump_add_result_table(const struct iplparams_iplparams *p) prlog(PR_DEBUG, "FADUMP: Dump found, MDRT count = 0x%x\n", mdrt_cnt); - /* Calculcate property size */ + /* Number of entries in MDRT table + 1 for arch register data */ prop_size = sizeof(struct fadump) + - (mdrt_cnt * sizeof(struct fadump_section)); + ((mdrt_cnt + 1) * sizeof(struct fadump_section)); result_table = zalloc(prop_size); if (!result_table) { prlog(PR_ERR, "FADUMP: Failed to allocate memory\n"); @@ -1126,6 +1164,9 @@ static void fadump_add_result_table(const struct iplparams_iplparams *p) return; } + /* Add architected register data to result-table */ + fadump_add_arch_regs(dump_node, result_table, &j); + result_table->section_count = j; /* Actual property size */ prop_size = sizeof(struct fadump) + (j * sizeof(struct fadump_section)); @@ -1151,6 +1192,10 @@ static void fadump_add_node(void) fw_load_area[2] = (u64)INITRAMFS_LOAD_BASE; fw_load_area[3] = INITRAMFS_LOAD_SIZE; dt_add_property(node, "fw-load-area", fw_load_area, sizeof(fw_load_area)); + + /* Architected register data format version */ + dt_add_property_cells(node, "cpu-data-version", + PROC_DUMP_AREA_FORMAT_P9); } static void add_iplparams_sys_params(const void *iplp, struct dt_node *node)