From patchwork Wed Nov 28 11:02:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasant Hegde X-Patchwork-Id: 1004439 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 434dGF74qtz9s55 for ; Wed, 28 Nov 2018 22:09:41 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 434dGF58YjzDqjH for ; Wed, 28 Nov 2018 22:09:41 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=hegdevasant@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 434d7X3c7DzDqgD for ; Wed, 28 Nov 2018 22:03:52 +1100 (AEDT) Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id wASAxPsu078721 for ; Wed, 28 Nov 2018 06:03:50 -0500 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0a-001b2d01.pphosted.com with ESMTP id 2p1qjwnnvy-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 28 Nov 2018 06:03:50 -0500 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 28 Nov 2018 11:03:45 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id wASB3j808913358 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 28 Nov 2018 11:03:45 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D7BF9A4057; Wed, 28 Nov 2018 11:03:44 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3511BA4040; Wed, 28 Nov 2018 11:03:43 +0000 (GMT) Received: from hegdevasant.in.ibm.com (unknown [9.109.198.143]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 28 Nov 2018 11:03:42 +0000 (GMT) From: Vasant Hegde To: skiboot@lists.ozlabs.org Date: Wed, 28 Nov 2018 16:32:41 +0530 X-Mailer: git-send-email 2.14.3 In-Reply-To: <20181128110244.17664-1-hegdevasant@linux.vnet.ibm.com> References: <20181128110244.17664-1-hegdevasant@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18112811-0020-0000-0000-000002EEF23A X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18112811-0021-0000-0000-0000213E4B65 Message-Id: <20181128110244.17664-20-hegdevasant@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-11-28_07:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=4 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1811280100 Subject: [Skiboot] [PATCH v6 19/22] mbox: Reset bmc mbox in MPIPL path X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stewart@linux.vnet.ibm.com, hbathini@linux.vnet.ibm.com, Andrew Jeffery MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" During boot SBE and early hostboot does not use MBOX protocol to get image from PNOR. Instead it expects PNOR TOC and Hostboot Boot Loader to be availabe at particular address in LPC bus. mbox daemon in BMC side takes care of this during normal boot. Once boot is complete mbox daemon swiches to normal mode. During normal reboot, BMC side mbox daemon gets notification and takes care of loading PNOR TOC and HBBL to LPC bus again. In MPIPL path, OPAL calls SBE S0 interrupt to initiate MPIPL. BMC will not be aware of this. But SBE expects PNOR TOC and HBBL to be available in LPC bus at predefined address. Hence call MBOX Reset from OPAL in assert path. Note that this is workaround to get mbox working for now. Long term solution is to use a bit in the Host Status byte of the mbox protocol's memory layout to indicate to mboxd that the host is preparing for reboot. We will implement once BMC side implementation is complete. CC: Andrew Jeffery Signed-off-by: Vasant Hegde --- core/flash.c | 9 ++++++++ hw/sbe-p9.c | 3 +++ include/skiboot.h | 1 + libflash/ipmi-hiomap.c | 25 +++++++++++++++++++++ libflash/mbox-flash.c | 23 +++++++++++++++++++ libflash/test/mbox-server.c | 1 + libflash/test/test-ipmi-hiomap.c | 48 ++++++++++++++++++++++++++++++++++++++++ 7 files changed, 110 insertions(+) diff --git a/core/flash.c b/core/flash.c index 08d69edc7..1b8af444a 100644 --- a/core/flash.c +++ b/core/flash.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -76,6 +77,14 @@ void flash_release(void) unlock(&flash_lock); } +void flash_unregister(void) +{ + struct blocklevel_device *bl = system_flash->bl; + + if (dt_find_compatible_node(dt_root, NULL, "mbox")) + ipmi_hiomap_exit(bl); +} + static int flash_nvram_info(uint32_t *total_size) { int rc; diff --git a/hw/sbe-p9.c b/hw/sbe-p9.c index 924f73761..d9bc07fe4 100644 --- a/hw/sbe-p9.c +++ b/hw/sbe-p9.c @@ -964,6 +964,9 @@ void p9_sbe_terminate(void) if (!dt_find_by_path(opal_node, "dump")) return; + /* Unregister flash. It will request BMC MBOX reset */ + flash_unregister(); + dt_for_each_compatible(dt_root, xn, "ibm,xscom") { chip_id = dt_get_chip_id(xn); diff --git a/include/skiboot.h b/include/skiboot.h index 8b53c7681..868a23b74 100644 --- a/include/skiboot.h +++ b/include/skiboot.h @@ -225,6 +225,7 @@ extern int flash_start_preload_resource(enum resource_id id, uint32_t subid, extern int flash_resource_loaded(enum resource_id id, uint32_t idx); extern bool flash_reserve(void); extern void flash_release(void); +extern void flash_unregister(void); #define FLASH_SUBPART_ALIGNMENT 0x1000 #define FLASH_SUBPART_HEADER_SIZE FLASH_SUBPART_ALIGNMENT extern int flash_subpart_info(void *part_header, uint32_t header_len, diff --git a/libflash/ipmi-hiomap.c b/libflash/ipmi-hiomap.c index ac47a1005..01fe90964 100644 --- a/libflash/ipmi-hiomap.c +++ b/libflash/ipmi-hiomap.c @@ -180,6 +180,7 @@ static void ipmi_hiomap_cmd_cb(struct ipmi_msg *msg) case HIOMAP_C_FLUSH: case HIOMAP_C_ACK: case HIOMAP_C_ERASE: + case HIOMAP_C_RESET: break; default: prlog(PR_WARNING, "Unimplemented command handler: %u\n", @@ -439,6 +440,29 @@ static bool hiomap_erase(struct ipmi_hiomap *ctx, uint64_t offset, return true; } +static bool hiomap_reset(struct ipmi_hiomap *ctx) +{ + RESULT_INIT(res, ctx); + unsigned char req[2]; + struct ipmi_msg *msg; + + prlog(PR_NOTICE, "Reset\n"); + + req[0] = HIOMAP_C_RESET; + req[1] = ++ctx->seq; + msg = ipmi_mkmsg(IPMI_DEFAULT_INTERFACE, + bmc_platform->sw->ipmi_oem_hiomap_cmd, + ipmi_hiomap_cmd_cb, &res, req, sizeof(req), 2); + ipmi_queue_msg_sync(msg); + + if (res.cc != IPMI_CC_NO_ERROR) { + prlog(PR_ERR, "%s failed: %d\n", __func__, res.cc); + return false; + } + + return true; +} + static void hiomap_event(uint8_t events, void *context) { struct ipmi_hiomap *ctx = context; @@ -871,6 +895,7 @@ void ipmi_hiomap_exit(struct blocklevel_device *bl) struct ipmi_hiomap *ctx; if (bl) { ctx = container_of(bl, struct ipmi_hiomap, bl); + hiomap_reset(ctx); free(ctx); } } diff --git a/libflash/mbox-flash.c b/libflash/mbox-flash.c index 11ec90523..1bae9fba8 100644 --- a/libflash/mbox-flash.c +++ b/libflash/mbox-flash.c @@ -816,6 +816,28 @@ static int mbox_flash_read(struct blocklevel_device *bl, uint64_t pos, return rc; } +static int mbox_flash_reset(struct blocklevel_device *bl) +{ + int rc; + struct mbox_flash_data *mbox_flash; + struct bmc_mbox_msg msg = MSG_CREATE(MBOX_C_RESET_STATE); + + prlog(PR_NOTICE, "MBOX reset\n"); + mbox_flash = container_of(bl, struct mbox_flash_data, bl); + + rc = msg_send(mbox_flash, &msg, mbox_flash->timeout); + if (rc) { + prlog(PR_ERR, "Failed to enqueue/send BMC MBOX RESET msg\n"); + return rc; + } + if (wait_for_bmc(mbox_flash, mbox_flash->timeout)) { + prlog(PR_ERR, "Error waiting for BMC\n"); + return rc; + } + + return OPAL_SUCCESS; +} + static int mbox_flash_get_info(struct blocklevel_device *bl, const char **name, uint64_t *total_size, uint32_t *erase_granule) { @@ -1171,6 +1193,7 @@ void mbox_flash_exit(struct blocklevel_device *bl) { struct mbox_flash_data *mbox_flash; if (bl) { + mbox_flash_reset(bl); mbox_flash = container_of(bl, struct mbox_flash_data, bl); free(mbox_flash); } diff --git a/libflash/test/mbox-server.c b/libflash/test/mbox-server.c index e03578834..d0d0e0938 100644 --- a/libflash/test/mbox-server.c +++ b/libflash/test/mbox-server.c @@ -286,6 +286,7 @@ int bmc_mbox_enqueue(struct bmc_mbox_msg *msg, switch (msg->command) { case MBOX_C_RESET_STATE: prlog(PR_INFO, "RESET_STATE\n"); + server_state.win_type = WIN_CLOSED; rc = open_window(msg, false, 0, LPC_BLOCKS); memset(msg->args, 0, sizeof(msg->args)); break; diff --git a/libflash/test/test-ipmi-hiomap.c b/libflash/test/test-ipmi-hiomap.c index 0ad08b4cf..7463dbd56 100644 --- a/libflash/test/test-ipmi-hiomap.c +++ b/libflash/test/test-ipmi-hiomap.c @@ -247,10 +247,26 @@ static const struct scenario_event hiomap_get_flash_info_call = { }, }; +static const struct scenario_event hiomap_reset_call = { + .type = scenario_cmd, + .c = { + .req = { + .cmd = HIOMAP_C_RESET, + .seq = 4, + }, + .cc = IPMI_CC_NO_ERROR, + .resp = { + .cmd = HIOMAP_C_RESET, + .seq = 4, + }, + }, +}; + static const struct scenario_event scenario_hiomap_init[] = { { .type = scenario_event_p, .p = &hiomap_ack_call, }, { .type = scenario_event_p, .p = &hiomap_get_info_call, }, { .type = scenario_event_p, .p = &hiomap_get_flash_info_call, }, + { .type = scenario_event_p, .p = &hiomap_reset_call, }, SCENARIO_SENTINEL, }; @@ -269,6 +285,7 @@ static const struct scenario_event scenario_hiomap_event_daemon_ready[] = { { .type = scenario_event_p, .p = &hiomap_get_info_call, }, { .type = scenario_event_p, .p = &hiomap_get_flash_info_call, }, { .type = scenario_sel, .s = { .bmc_state = HIOMAP_E_DAEMON_READY } }, + { .type = scenario_event_p, .p = &hiomap_reset_call, }, SCENARIO_SENTINEL, }; @@ -291,6 +308,7 @@ static const struct scenario_event scenario_hiomap_event_daemon_stopped[] = { { .type = scenario_event_p, .p = &hiomap_get_flash_info_call, }, { .type = scenario_sel, .s = { .bmc_state = HIOMAP_E_DAEMON_READY } }, { .type = scenario_sel, .s = { .bmc_state = HIOMAP_E_PROTOCOL_RESET } }, + { .type = scenario_event_p, .p = &hiomap_reset_call, }, SCENARIO_SENTINEL, }; @@ -314,6 +332,7 @@ static const struct scenario_event scenario_hiomap_event_daemon_restarted[] = { { .type = scenario_sel, .s = { .bmc_state = HIOMAP_E_DAEMON_READY } }, { .type = scenario_sel, .s = { .bmc_state = HIOMAP_E_PROTOCOL_RESET } }, { .type = scenario_sel, .s = { .bmc_state = HIOMAP_E_DAEMON_READY } }, + { .type = scenario_event_p, .p = &hiomap_reset_call, }, SCENARIO_SENTINEL, }; @@ -343,6 +362,7 @@ scenario_hiomap_event_daemon_lost_flash_control[] = { | HIOMAP_E_FLASH_LOST), } }, + { .type = scenario_event_p, .p = &hiomap_reset_call, }, SCENARIO_SENTINEL, }; @@ -445,6 +465,20 @@ scenario_hiomap_event_daemon_regained_flash_control_dirty[] = { }, }, }, + { + .type = scenario_cmd, + .c = { + .req = { + .cmd = HIOMAP_C_RESET, + .seq = 7, + }, + .cc = IPMI_CC_NO_ERROR, + .resp = { + .cmd = HIOMAP_C_RESET, + .seq = 7, + }, + }, + }, SCENARIO_SENTINEL, }; @@ -583,6 +617,20 @@ static const struct scenario_event scenario_hiomap_protocol_reset_recovery[] = { }, }, }, + { + .type = scenario_cmd, + .c = { + .req = { + .cmd = HIOMAP_C_RESET, + .seq = 9, + }, + .cc = IPMI_CC_NO_ERROR, + .resp = { + .cmd = HIOMAP_C_RESET, + .seq = 9, + }, + }, + }, SCENARIO_SENTINEL, };