From patchwork Tue Nov 27 06:21:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1003622 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 433ty04wW2z9s29 for ; Tue, 27 Nov 2018 17:23:04 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WVcy4XEs"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 433ty0357LzDqcm for ; Tue, 27 Nov 2018 17:23:04 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WVcy4XEs"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::444; helo=mail-pf1-x444.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WVcy4XEs"; dkim-atps=neutral Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 433twV3hRNzDqcR for ; Tue, 27 Nov 2018 17:21:46 +1100 (AEDT) Received: by mail-pf1-x444.google.com with SMTP id q1so7850635pfi.5 for ; Mon, 26 Nov 2018 22:21:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zebjAEDCH4SBmldefD08am4z6HYpC78YYB0EYDxvV1Q=; b=WVcy4XEsTXx9GWceO459rHe12Uus+hSSPc+lAyQZtOYDjAMoj87TdVdgMt58Wti7kt 5YUCPYH4/Jzt+HU2wI9Ho8baXhSih5ww+NvfYpWK0OjcbWQwjdddRp7mG7P8CDOleQ8C ogwV+ZDYWDUkgh27LlVkWG47CAt27BbgCRkSrbyQ/o5ZcHcW7Aoh+UE/LfR/f5/Ja8+I 2LxGecAP0N//lWA9Vy3faaRiRAeEKrkcIXBvlETRrAMDdXmiUYjBCYVD4lSWwjxh4R9i j2TpU4IbZ4GsT3zIez/zKXIf+fZEja8H2fMyYu7KMhUGk56R854G9r4et9M43mXXX519 PpgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zebjAEDCH4SBmldefD08am4z6HYpC78YYB0EYDxvV1Q=; b=MD0pw+e8rt9Gm0u/Ej5/8OlKU9iYdPfUdUDWMhfoStcOeLuF8SuoFBtRz0aBHBOQ26 HQnqQ+QKMiwpeBOt298SRDkzsF7AKsis5bBSBGUTFUgzQDet3MsLPL71GJeS7V3zfRoY dbySleCcLbuXO5ibdzeriOGYM4CWTcW78j0Exo8YGM5Q9fmfv0yGlutWbcvdQM61Itz6 jXvyC31D0Hy3b4UClxPXsZ+KIe1Gjlh0e8NOnTC0ORsXMBJJaJ92wlIhJ3oF/mygEOIX ATZ+103ThGvwBkHDMmShYtllOcVkeCD/mi5zLMbo+2KzsJ70Hyx8KevcJrc4URdBbwdk qGbA== X-Gm-Message-State: AGRZ1gLtMAooGgo8fzMfpYvp7xpnr3Go3zulK2TpTs/qA764+v0t+mZt OVVLB8+iFES52q+4QJhQFOlBKjkd X-Google-Smtp-Source: AJdET5fjxvyR9l6ofEfincTE0EnyxaDAuF+T5BqedyWFPoA1IwvAwJMj0cbQgX48WK4nPDB/vS5+UA== X-Received: by 2002:a62:9683:: with SMTP id s3mr31498266pfk.60.1543299704486; Mon, 26 Nov 2018 22:21:44 -0800 (PST) Received: from wafer.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id r83sm4371741pfc.115.2018.11.26.22.21.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Nov 2018 22:21:44 -0800 (PST) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 27 Nov 2018 17:21:19 +1100 Message-Id: <20181127062119.15775-4-oohall@gmail.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181127062119.15775-1-oohall@gmail.com> References: <20181127062119.15775-1-oohall@gmail.com> Subject: [Skiboot] [PATCH 4/4] phb4: Eliminate peltv_cache X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The PELT-V is also an in-memory table and there is no reason to have two copies of it. Removing the cache shaves another 128KB off the size of each struct phb4. Signed-off-by: Oliver O'Halloran Reviewed-by: Andrew Donnellan --- hw/phb4.c | 30 +++++++++++++----------------- include/phb4.h | 3 +-- 2 files changed, 14 insertions(+), 19 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index 14fa94b50f75..c52e0b537e56 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -934,7 +934,6 @@ static void phb4_init_ioda_cache(struct phb4 *p) * ever let a live FF RTT even temporarily when resetting * for EEH etc... (HW278969). */ - memset(p->peltv_cache, 0x0, sizeof(p->peltv_cache)); memset(p->tve_cache, 0x0, sizeof(p->tve_cache)); /* XXX Should we mask them ? */ @@ -1162,11 +1161,11 @@ static int64_t phb4_ioda_reset(struct phb *phb, bool purge) /* Additional OPAL specific inits */ - /* Clear RTT and PELTV and PEST */ + /* Clear RTT and PELTV */ for (i = 0; i < RTT_TABLE_ENTRIES; i++) p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); - memcpy((void *)p->tbl_peltv, p->peltv_cache, p->tbl_peltv_size); + memset(p->tbl_peltv, 0x0, p->tbl_peltv_size); /* Clear PEST & PEEV */ for (i = 0; i < p->max_num_pes; i++) { @@ -2206,7 +2205,6 @@ static int64_t phb4_set_peltv(struct phb *phb, uint8_t state) { struct phb4 *p = phb_to_phb4(phb); - uint8_t *peltv; uint32_t idx, mask; /* Sanity check */ @@ -2218,15 +2216,10 @@ static int64_t phb4_set_peltv(struct phb *phb, idx += (child_pe / 8); mask = 0x1 << (7 - (child_pe % 8)); - peltv = (uint8_t *)p->tbl_peltv; - peltv += idx; - if (state) { - *peltv |= mask; - p->peltv_cache[idx] |= mask; - } else { - *peltv &= ~mask; - p->peltv_cache[idx] &= ~mask; - } + if (state) + p->tbl_peltv[idx] |= mask; + else + p->tbl_peltv[idx] &= ~mask; return OPAL_SUCCESS; } @@ -4596,7 +4589,8 @@ static void phb4_init_ioda3(struct phb4 *p) out_be64(p->regs + PHB_RTT_BAR, (u64) p->tbl_rtt | PHB_RTT_BAR_ENABLE); /* Init_21 - PELT-V BAR */ - out_be64(p->regs + PHB_PELTV_BAR, p->tbl_peltv | PHB_PELTV_BAR_ENABLE); + out_be64(p->regs + PHB_PELTV_BAR, + (u64) p->tbl_peltv | PHB_PELTV_BAR_ENABLE); /* Init_22 - Setup M32 starting address */ out_be64(p->regs + PHB_M32_START_ADDR, M32_PCI_START); @@ -5121,9 +5115,9 @@ static void phb4_allocate_tables(struct phb4 *p) for (i = 0; i < RTT_TABLE_ENTRIES; i++) p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); - p->tbl_peltv = (uint64_t)local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size); + p->tbl_peltv = local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size); assert(p->tbl_peltv); - memset((void *)p->tbl_peltv, 0, p->tbl_peltv_size); + memset(p->tbl_peltv, 0, p->tbl_peltv_size); p->tbl_pest = (uint64_t)local_alloc(p->chip_id, p->tbl_pest_size, p->tbl_pest_size); assert(p->tbl_pest); @@ -5231,7 +5225,9 @@ static void phb4_add_properties(struct phb4 *p) hi32((u64) p->tbl_rtt), lo32((u64) p->tbl_rtt), RTT_TABLE_SIZE); dt_add_property_cells(np, "ibm,opal-peltv-table", - hi32(p->tbl_peltv), lo32(p->tbl_peltv), p->tbl_peltv_size); + hi32((u64) p->tbl_peltv), lo32((u64) p->tbl_peltv), + p->tbl_peltv_size); + dt_add_property_cells(np, "ibm,opal-pest-table", hi32(p->tbl_pest), lo32(p->tbl_pest), p->tbl_pest_size); diff --git a/include/phb4.h b/include/phb4.h index 6a5e9d5c8723..c70f713b2d63 100644 --- a/include/phb4.h +++ b/include/phb4.h @@ -197,7 +197,7 @@ struct phb4 { /* SkiBoot owned in-memory tables */ uint16_t *tbl_rtt; - uint64_t tbl_peltv; + uint8_t *tbl_peltv; uint64_t tbl_peltv_size; uint64_t tbl_pest; uint64_t tbl_pest_size; @@ -216,7 +216,6 @@ struct phb4 { /* FIXME: dynamically allocate only what's needed below */ uint64_t tve_cache[1024]; - uint8_t peltv_cache[PELTV_TABLE_SIZE_MAX]; uint64_t mbt_cache[32][2]; uint64_t mdt_cache[512]; /* max num of PEs */ uint64_t mist_cache[4096/4];/* max num of MSIs */