[RFC,v3,06/17] dt-bindings: timer: Add Allwinner suniv timer
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Message ID 9927bde09ef20cadccdf81541fd1f91165508357.1542824904.git.mesihkilinc@gmail.com
State New
Headers show
Series
  • initial support for "suniv" Allwinner new ARM9 SoC
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Commit Message

Mesih Kilinc Nov. 21, 2018, 6:30 p.m. UTC
Add compatible string for Allwinner suniv timer which is similar to
sun4i timer.

Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
---
 Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Maxime Ripard Nov. 22, 2018, 8:35 a.m. UTC | #1
On Wed, Nov 21, 2018 at 09:30:39PM +0300, Mesih Kilinc wrote:
> Add compatible string for Allwinner suniv timer which is similar to
> sun4i timer.
> 
> Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

Patch
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diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
index 5c2e235..3da9d51 100644
--- a/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
+++ b/Documentation/devicetree/bindings/timer/allwinner,sun4i-timer.txt
@@ -2,7 +2,9 @@  Allwinner A1X SoCs Timer Controller
 
 Required properties:
 
-- compatible : should be "allwinner,sun4i-a10-timer"
+- compatible : should be one of the following:
+              "allwinner,sun4i-a10-timer"
+              "allwinner,suniv-f1c100s-timer"
 - reg : Specifies base physical address and size of the registers.
 - interrupts : The interrupt of the first timer
 - clocks: phandle to the source clock (usually a 24 MHz fixed clock)