| Message ID | 20181010170936.316862-1-lkundrak@v3.sk |
|---|---|
| Headers | show |
| Series | spi: pxa2xx: add DT and slave mode support | expand |
Hi Lubomir, On Wed, Oct 10, 2018 at 7:10 PM Lubomir Rintel <lkundrak@v3.sk> wrote: > Some drivers, such as spi-pxa2xx return from the transfer_one callback > immediately, idicating that the transfer will be finished asynchronously. > > Normally, spi_transfer_one_message() synchronously waits for the > transfer to finish with wait_for_completion_timeout(). For slaves, we > don't want the transaction to time out as it can complete in a long time > in future. Use wait_for_completion_interruptible() instead. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Thanks for your patch! > --- a/drivers/spi/spi.c > +++ b/drivers/spi/spi.c > @@ -993,6 +993,44 @@ static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) > return __spi_map_msg(ctlr, msg); > } > > +static int spi_transfer_wait(struct spi_controller *ctlr, > + struct spi_message *msg, > + struct spi_transfer *xfer) > +{ > + struct spi_statistics *statm = &ctlr->statistics; > + struct spi_statistics *stats = &msg->spi->statistics; > + unsigned long long ms = 1; > + > + if (spi_controller_is_slave(ctlr)) { > + if (wait_for_completion_interruptible(&ctlr->xfer_completion)) { > + dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n"); > + return -EINTR; Why not setting msg->status = -EINTR here, but returning an error? ... > + } > + } else { > + ms = 8LL * 1000LL * xfer->len; > + do_div(ms, xfer->speed_hz); > + ms += ms + 200; /* some tolerance */ > + > + if (ms > UINT_MAX) > + ms = UINT_MAX; > + > + ms = wait_for_completion_timeout(&ctlr->xfer_completion, > + msecs_to_jiffies(ms)); > + > + if (ms == 0) { > + SPI_STATISTICS_INCREMENT_FIELD(statm, > + timedout); > + SPI_STATISTICS_INCREMENT_FIELD(stats, > + timedout); > + dev_err(&msg->spi->dev, > + "SPI transfer timed out\n"); > + msg->status = -ETIMEDOUT; > + } > + } > + > + return 0; > +} > + > /* > * spi_transfer_one_message - Default implementation of transfer_one_message() > * > @@ -1006,7 +1044,6 @@ static int spi_transfer_one_message(struct spi_controller *ctlr, > struct spi_transfer *xfer; > bool keep_cs = false; > int ret = 0; > - unsigned long long ms = 1; > struct spi_statistics *statm = &ctlr->statistics; > struct spi_statistics *stats = &msg->spi->statistics; > > @@ -1035,28 +1072,11 @@ static int spi_transfer_one_message(struct spi_controller *ctlr, > goto out; > } > > - if (ret > 0) { > - ret = 0; > - ms = 8LL * 1000LL * xfer->len; > - do_div(ms, xfer->speed_hz); > - ms += ms + 200; /* some tolerance */ > - > - if (ms > UINT_MAX) > - ms = UINT_MAX; > + if (ret > 0) > + ret = spi_transfer_wait(ctlr, msg, xfer); > > - ms = wait_for_completion_timeout(&ctlr->xfer_completion, > - msecs_to_jiffies(ms)); > - } > - > - if (ms == 0) { > - SPI_STATISTICS_INCREMENT_FIELD(statm, > - timedout); > - SPI_STATISTICS_INCREMENT_FIELD(stats, > - timedout); > - dev_err(&msg->spi->dev, > - "SPI transfer timed out\n"); > - msg->status = -ETIMEDOUT; > - } > + if (ret < 0) > + return ret; ... which will return here, skipping all finalization and cleanup below? > } else { > if (xfer->len) > dev_err(&msg->spi->dev, Gr{oetje,eeting}s, Geert
Hi Lubomir, On Wed, Oct 10, 2018 at 7:10 PM Lubomir Rintel <lkundrak@v3.sk> wrote: > Strobe a GPIO line when the slave TX FIFO is filled. This is how the > Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI > master, learns that it can initiate a transaction. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Thanks for your patch! I'm repeating my comments on the RFC below: > --- a/drivers/spi/spi-pxa2xx.c > +++ b/drivers/spi/spi-pxa2xx.c > @@ -1079,6 +1079,9 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, > if (spi_controller_is_slave(master)) { > while (drv_data->write(drv_data)) > ; > + gpiod_set_value(drv_data->gpiod_ready, 1); > + udelay(1); > + gpiod_set_value(drv_data->gpiod_ready, 0); While gpiod_set_value() handles the case of no GPIO fine, I think it's better to explicitly check for that, so you can avoid spinning for 1 µs if the GPIO is not present. > } > > /* > @@ -1784,6 +1787,15 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) > } > } > > + if (platform_info->is_slave) { > + drv_data->gpiod_ready = devm_gpiod_get_optional(dev, > + "ready", GPIOD_OUT_LOW); > + if (IS_ERR(drv_data->gpiod_ready)) { > + status = (int)PTR_ERR(drv_data->gpiod_ready); The cast to int is not needed. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On Thu, 2018-10-11 at 09:28 +0200, Geert Uytterhoeven wrote: > Hi Lubomir, > > On Wed, Oct 10, 2018 at 7:10 PM Lubomir Rintel <lkundrak@v3.sk> > wrote: > > Strobe a GPIO line when the slave TX FIFO is filled. This is how > > the > > Embedded Controller on an OLPC XO-1.75 machine, that happens to be > > a SPI > > master, learns that it can initiate a transaction. > > > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> > > Thanks for your patch! > > I'm repeating my comments on the RFC below: Ah, sorry for not addressing those; it somehow slipped through my fingers. I'll wait a while to collect more feedback before sending v2 and then I'll include fixes for those. Thanks for the review. Lubo
On Wed, Oct 10, 2018 at 07:09:30PM +0200, Lubomir Rintel wrote: > There seem to be SSP2, SSP4 and perhaps SSP5 too, but Marvel keeps their > base addresses secret. > > The SSP1 and SSP3 addresses were taken from OLPC 1.75, OpenFirmware and > kernel respectively. Sorry for the delay. Love your work! From my notes, SSP2 is 0xd4036000, and SSP4 is 0xd4039000. Can be probed by hand in OpenFirmware or CForth once clocks are on.
On Wed 2018-10-10 19:09:27, Lubomir Rintel wrote: > This spares drivers from #ifdef-ing on CONFIG_PCI if the driver can be > optionally built on machines without PCI bus. > > Consistent with acpi_driver_match_device() and similar. > > Acked-by: Bjorn Helgaas <bhelgaas@google.com> > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> Pavel
On Wed 2018-10-10 19:09:28, Lubomir Rintel wrote: > That seems to be the correct type. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz>
On Wed 2018-10-10 19:09:29, Lubomir Rintel wrote: > The MMP2 platform, that uses device tree, has this controller. Let's add > devicetree alongside platform & PCI. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz>
On Wed 2018-10-10 19:09:30, Lubomir Rintel wrote: > There seem to be SSP2, SSP4 and perhaps SSP5 too, but Marvel keeps their > base addresses secret. > > The SSP1 and SSP3 addresses were taken from OLPC 1.75, OpenFirmware and > kernel respectively. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz>
On Wed 2018-10-10 19:09:32, Lubomir Rintel wrote: > Some drivers, such as spi-pxa2xx return from the transfer_one callback > immediately, idicating that the transfer will be finished asynchronously. > > Normally, spi_transfer_one_message() synchronously waits for the > transfer to finish with wait_for_completion_timeout(). For slaves, we > don't want the transaction to time out as it can complete in a long time > in future. Use wait_for_completion_interruptible() instead. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> > @@ -993,6 +993,44 @@ static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) > return __spi_map_msg(ctlr, msg); > } > > +static int spi_transfer_wait(struct spi_controller *ctlr, > + struct spi_message *msg, > + struct spi_transfer *xfer) > +{ > + struct spi_statistics *statm = &ctlr->statistics; > + struct spi_statistics *stats = &msg->spi->statistics; > + unsigned long long ms = 1; > + > + if (spi_controller_is_slave(ctlr)) { > + if (wait_for_completion_interruptible(&ctlr->xfer_completion)) { > + dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n"); > + return -EINTR; > + } Do "return 0" here, and you can get rid of the else branch. > + } else { > + ms = 8LL * 1000LL * xfer->len; > + do_div(ms, xfer->speed_hz); > + ms += ms + 200; /* some tolerance */ > + > + if (ms > UINT_MAX) > + ms = UINT_MAX; > + > + ms = wait_for_completion_timeout(&ctlr->xfer_completion, > + msecs_to_jiffies(ms)); > + > + if (ms == 0) { > + SPI_STATISTICS_INCREMENT_FIELD(statm, > + timedout); > + SPI_STATISTICS_INCREMENT_FIELD(stats, > + timedout); > + dev_err(&msg->spi->dev, > + "SPI transfer timed out\n"); > + msg->status = -ETIMEDOUT; > + } > + } > + > + return 0; > +} > + > /* > * spi_transfer_one_message - Default implementation of transfer_one_message() > *
On Wed 2018-10-10 19:09:33, Lubomir Rintel wrote: > Tested on an OLPC XO-1.75 machine, where the Embedded Controller happens > to be a SPI master. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz>
On Wed 2018-10-10 19:09:35, Lubomir Rintel wrote: > Strobe a GPIO line when the slave TX FIFO is filled. This is how the > Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI > master, learns that it can initiate a transaction. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz> > --- > drivers/spi/spi-pxa2xx.c | 12 ++++++++++++ > drivers/spi/spi-pxa2xx.h | 3 +++ > 2 files changed, 15 insertions(+) > > diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c > index 3848842d68fd..a3b4b12c1077 100644 > --- a/drivers/spi/spi-pxa2xx.c > +++ b/drivers/spi/spi-pxa2xx.c > @@ -1079,6 +1079,9 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, > if (spi_controller_is_slave(master)) { > while (drv_data->write(drv_data)) > ; > + gpiod_set_value(drv_data->gpiod_ready, 1); > + udelay(1); > + gpiod_set_value(drv_data->gpiod_ready, 0); > } > > /* > @@ -1784,6 +1787,15 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) > } > } > > + if (platform_info->is_slave) { > + drv_data->gpiod_ready = devm_gpiod_get_optional(dev, > + "ready", GPIOD_OUT_LOW); > + if (IS_ERR(drv_data->gpiod_ready)) { > + status = (int)PTR_ERR(drv_data->gpiod_ready); > + goto out_error_clock_enabled; > + } > + } > + > pm_runtime_set_autosuspend_delay(&pdev->dev, 50); > pm_runtime_use_autosuspend(&pdev->dev); > pm_runtime_set_active(&pdev->dev); > diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h > index 513c53aaeab2..4e324da66ef7 100644 > --- a/drivers/spi/spi-pxa2xx.h > +++ b/drivers/spi/spi-pxa2xx.h > @@ -64,6 +64,9 @@ struct driver_data { > > /* GPIOs for chip selects */ > struct gpio_desc **cs_gpiods; > + > + /* Optional slave FIFO ready signal */ > + struct gpio_desc *gpiod_ready; > }; > > struct chip_data {
On Wed 2018-10-10 19:09:36, Lubomir Rintel wrote: > There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is > super-secret and the method described in Armada 16x manual won't work: > > "The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or > disabled (by writing a 0b0 to the <Synchronous Serial Port Enable> field > in the SSP Control Register 0)." > > # devmem 0xd4037008 # read SSSR > 0x0000F204 > # devmem 0xd4037000 32 0x80 # SSE off in SSCR0 > # devmem 0xd4037000 32 0x87 # SSE on > # devmem 0xd4037008 > 0x0000F204 > ^ TXFIFO level is still 2. Sigh. > > The OLPC 1.75 boot firmware leaves two bytes in the TXFIFO. Those are > basically throwaway bytes used in response to the messages from the EC. > The OLPC kernel copes with this by power-cycling the hardware. Perhaps > the firmware should do this instead. > > Other than that, there's not much we can do other than complain loudly > until the garbage gets drained and discard the actual data... For the > OLPC EC this will work just fine and pushing more data to TXFIFO would > break further transactions. > > Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Pavel Machek <pavel@ucw.cz>