[0/9] Initial "big cores" support for POWER9

Message ID	20180927044849.28322-1-benh@kernel.crashing.org
Headers	show Return-Path: <skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org> From: Benjamin Herrenschmidt <benh@kernel.crashing.org> To: skiboot@lists.ozlabs.org Date: Thu, 27 Sep 2018 14:48:40 +1000 Message-Id: <20180927044849.28322-1-benh@kernel.crashing.org> Subject: [Skiboot] [PATCH 0/9] Initial "big cores" support for POWER9 Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" <skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>
Series	Initial "big cores" support for POWER9 \| expand [0/9] Initial "big cores" support for POWER9 [1/9] Add basic P9 fused core support [2/9] hdat: Workaround HostBoot bug with fused core [3/9] xive: Set the fused core mode properly [4/9] chip: Fix pir_to_thread_id for fused cores [5/9] cpu: Keep track of the "ec_primary" in big core more [6/9] direct-ctl: Use the EC primary for special wakeups [7/9] slw: Limit fused cores P9 to STOP0/1 [8/9] cpu: Make cpu_get_core_index() return the fused core number [9/9] imc: Use pir_to_core_id() rather than cpu_get_core_index()

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20180927044849.28322-1-benh@kernel.crashing.org

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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: skiboot@lists.ozlabs.org
Date: Thu, 27 Sep 2018 14:48:40 +1000
Message-Id: <20180927044849.28322-1-benh@kernel.crashing.org>
Subject: [Skiboot] [PATCH 0/9] Initial "big cores" support for POWER9
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Series

Initial "big cores" support for POWER9 | expand

Message

Benjamin Herrenschmidt Sept. 27, 2018, 4:48 a.m. UTC

This is based on initial work by Ryan Grimm with additions & cleanups by
myself.

Some notes:

 - This currently needs a special modified HostBoot

 - It's missing the "ibm,thread-groups" property to inform Linux about big cores

 - We need to look at HMI issues, as in some cases TFAC errors get only sent to
   one half but both half need to rendez-vous, so we need to "trigger" an error
   in the other half as well.

The above aren't blockers, it should be possible to merge this first.