Message ID | cover.1531384753.git.zong@andestech.com |
---|---|
Headers | show |
Series | RISC-V glibc port for the 32 bit | expand |
On 07/12/2018 03:26 AM, Zong Li wrote: > This patch set contains the glibc port for the 32 bit RISC-V. I ran the glibc > test suite on QEMU, and remained the failed cases which caused by environment > issue like 64 bit glibc port. In addition, there are some math test cases > need to be checked but it look unlike glibc's problem now. There is an issue with the stat structure that should be resolved before the 32-bit RISC-V port is upstreamed. I'm seeing failures with github riscv/riscv-gnu-toolchain when building a riscv32-linux toolchain and using a user-mode qemu for testing. There is some discussion here https://github.com/riscv/riscv-gnu-toolchain/pull/325 and here https://github.com/riscv/riscv-qemu/issues/135 The latter one suggests that we should first fix the 32-bit RISC-V linux port to add #define __ARCH_WANT_STAT64 to arch/include/riscv/asm/unistd.h, and then modify qemu, glibc, and musl appropriately to match the kernel. I don't have a riscv32-linux system I can boot, so I can't easily look at this problem. Jim