| Message ID | 20180704224511.29350-1-yixun.lan@amlogic.com |
|---|---|
| Headers | show |
| Series | pinctrl: meson-g12a: add pinctrl driver support | expand |
Hi Yixun, On 05/07/2018 00:45, Yixun Lan wrote: > This patch series try to add pinctrl driver support for > the Meson-G12A SoC. Thanks for submitting these patches. Can you explicit this patchset with more details on the G12A SoC family ? It's relationship with AXG and the differences in term of pinmuxing with the other SoC families ? Why is there a GPIOE bank within the AO controller ? Thanks, Neil > > Yixun Lan (3): > documentation: Add compatibles for Amlogic Meson G12A pin controllers > dt-bindings: pinctrl: meson-g12a: document pin name > pinctrl: meson-g12a: add pinctrl driver support > > .../bindings/pinctrl/meson,pinctrl.txt | 2 + > drivers/pinctrl/meson/Kconfig | 6 + > drivers/pinctrl/meson/Makefile | 1 + > drivers/pinctrl/meson/pinctrl-meson-g12a.c | 1432 +++++++++++++++++ > include/dt-bindings/gpio/meson-g12a-gpio.h | 114 ++ > 5 files changed, 1555 insertions(+) > create mode 100644 drivers/pinctrl/meson/pinctrl-meson-g12a.c > create mode 100644 include/dt-bindings/gpio/meson-g12a-gpio.h > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
HI Neil On 07/04/18 22:57, Neil Armstrong wrote: > Hi Yixun, > > On 05/07/2018 00:45, Yixun Lan wrote: >> This patch series try to add pinctrl driver support for >> the Meson-G12A SoC. > > Thanks for submitting these patches. > > Can you explicit this patchset with more details on the G12A SoC family ? > It's relationship with AXG and the differences in term of pinmuxing with the other SoC families ? > I thought this was already discussed while we doing pinctrl driver for Meson-AXG SoC. Anyway, here it is: Starting from Meson-AXG SoC, the pinctrl controller block using 4 continues bit to specific pin mux function, while comparing to old generation SoC which kind of using various length bits for the pin mux definition. The new design would greatly simplify the software model.. for detail example, one 32bit register can describe 8 pins, and each of them has 0-7 value to set, start from value 0 to 7. partition the register into 8 parts: bit[3:0] bit[7:4] bit[11:8] bit[15:12] bit[19:16] bit[23:20] bit[27:24] bit[31:28] for each value: value == 0, means the pin is GPIO value = {1, 2, ... 7 } is one of specific PIN function I could put this info into cover-letter or commit message? > Why is there a GPIOE bank within the AO controller ? > It actually sit in the AO domain, although it's sounds strange from the naming.. I'm not sure if it's good idea to append a AO suffix? since the documentation just use the plain GPIOE > Thanks, > Neil > >> >> Yixun Lan (3): >> documentation: Add compatibles for Amlogic Meson G12A pin controllers >> dt-bindings: pinctrl: meson-g12a: document pin name >> pinctrl: meson-g12a: add pinctrl driver support >> >> .../bindings/pinctrl/meson,pinctrl.txt | 2 + >> drivers/pinctrl/meson/Kconfig | 6 + >> drivers/pinctrl/meson/Makefile | 1 + >> drivers/pinctrl/meson/pinctrl-meson-g12a.c | 1432 +++++++++++++++++ >> include/dt-bindings/gpio/meson-g12a-gpio.h | 114 ++ >> 5 files changed, 1555 insertions(+) >> create mode 100644 drivers/pinctrl/meson/pinctrl-meson-g12a.c >> create mode 100644 include/dt-bindings/gpio/meson-g12a-gpio.h >> > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Jul 4, 2018 at 4:48 PM Yixun Lan <yixun.lan@amlogic.com> wrote: > > This patch series try to add pinctrl driver support for > the Meson-G12A SoC. > > > Yixun Lan (3): > documentation: Add compatibles for Amlogic Meson G12A pin controllers > dt-bindings: pinctrl: meson-g12a: document pin name > pinctrl: meson-g12a: add pinctrl driver support Overall this looks good to me, could we get some review or ACKs from Beniamino, Martin and/or Carlo as an indication that everything seems all right before I apply the series? Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Yixun, On Thu, Jul 5, 2018 at 4:53 AM Yixun Lan <yixun.lan@amlogic.com> wrote: > > HI Neil > > On 07/04/18 22:57, Neil Armstrong wrote: > > Hi Yixun, > > > > On 05/07/2018 00:45, Yixun Lan wrote: > >> This patch series try to add pinctrl driver support for > >> the Meson-G12A SoC. > > > > Thanks for submitting these patches. > > > > Can you explicit this patchset with more details on the G12A SoC family ? > > It's relationship with AXG and the differences in term of pinmuxing with the other SoC families ? > > > I thought this was already discussed while we doing pinctrl driver for > Meson-AXG SoC. > > Anyway, here it is: > > Starting from Meson-AXG SoC, the pinctrl controller block using 4 > continues bit to specific pin mux function, while comparing to old > generation SoC which kind of using various length bits for the pin mux > definition. The new design would greatly simplify the software model.. > > for detail example, one 32bit register can describe 8 pins, and each of > them has 0-7 value to set, start from value 0 to 7. > > partition the register into 8 parts: > bit[3:0] > bit[7:4] > bit[11:8] > bit[15:12] > bit[19:16] > bit[23:20] > bit[27:24] > bit[31:28] > > > for each value: > value == 0, means the pin is GPIO > value = {1, 2, ... 7 } is one of specific PIN function OK, so AXG and G12A use the same register layout -> thus the same pinmux ops are re-used > I could put this info into cover-letter or commit message? if you have to resend this series anyways then it would be great if you could add it to the commit description > > Why is there a GPIOE bank within the AO controller ? > > > > It actually sit in the AO domain, although it's sounds strange from the > naming.. > > I'm not sure if it's good idea to append a AO suffix? since the > documentation just use the plain GPIOE I am fine with plain GPIOE if that's what your internal documentation uses it would be great if you could add a comment (or at least a note in the commit message) indicating that this is how the hardware is designed (initially I thought this was a bug since I have no documentation for the G12A chipset) Regards Martin -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Linus, On Mon, Jul 9, 2018 at 3:35 PM Linus Walleij <linus.walleij@linaro.org> wrote: > > On Wed, Jul 4, 2018 at 4:48 PM Yixun Lan <yixun.lan@amlogic.com> wrote: > > > > This patch series try to add pinctrl driver support for > > the Meson-G12A SoC. > > > > > > Yixun Lan (3): > > documentation: Add compatibles for Amlogic Meson G12A pin controllers > > dt-bindings: pinctrl: meson-g12a: document pin name > > pinctrl: meson-g12a: add pinctrl driver support > > Overall this looks good to me, could we get some review or ACKs > from Beniamino, Martin and/or Carlo as an indication that everything > seems all right before I apply the series? I do not have any documentation for this hardware (I'm not even sure if this is the successor to AXG/"the Audio SoCs" or rather a successor of GXL or GXM/"the OTT/STB SoCs" - I assume it's their new OTT/STB SoCs since G12A is mentioned here and it seems to have a GPU: [0]) I will try to have a look in the next few days and see if I can spot anything obvious not sure if Neil or Kevin have access to the documentation, so it'd be great if they could give feedback as well Regards Martin [0] http://openlinux.amlogic.com:8000/download/doc/Linux_BSP_Kernel4.9_Buildroot_OpenLinux_Release_Notes_V20180330.pdf -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
HI Martin: thanks for your suggestion On 07/10/18 06:02, Martin Blumenstingl wrote: > Hi Yixun, > > On Thu, Jul 5, 2018 at 4:53 AM Yixun Lan <yixun.lan@amlogic.com> wrote: >> >> HI Neil >> >> On 07/04/18 22:57, Neil Armstrong wrote: >>> Hi Yixun, >>> >>> On 05/07/2018 00:45, Yixun Lan wrote: >>>> This patch series try to add pinctrl driver support for >>>> the Meson-G12A SoC. >>> >>> Thanks for submitting these patches. >>> >>> Can you explicit this patchset with more details on the G12A SoC family ? >>> It's relationship with AXG and the differences in term of pinmuxing with the other SoC families ? >>> >> I thought this was already discussed while we doing pinctrl driver for >> Meson-AXG SoC. >> >> Anyway, here it is: >> >> Starting from Meson-AXG SoC, the pinctrl controller block using 4 >> continues bit to specific pin mux function, while comparing to old >> generation SoC which kind of using various length bits for the pin mux >> definition. The new design would greatly simplify the software model.. >> >> for detail example, one 32bit register can describe 8 pins, and each of >> them has 0-7 value to set, start from value 0 to 7. >> >> partition the register into 8 parts: >> bit[3:0] >> bit[7:4] >> bit[11:8] >> bit[15:12] >> bit[19:16] >> bit[23:20] >> bit[27:24] >> bit[31:28] >> >> >> for each value: >> value == 0, means the pin is GPIO >> value = {1, 2, ... 7 } is one of specific PIN function > OK, so AXG and G12A use the same register layout -> thus the same > pinmux ops are re-used > Yes > > >> I could put this info into cover-letter or commit message? > if you have to resend this series anyways then it would be great if > you could add it to the commit description > sure >>> Why is there a GPIOE bank within the AO controller ? >>> >> >> It actually sit in the AO domain, although it's sounds strange from the >> naming.. >> >> I'm not sure if it's good idea to append a AO suffix? since the >> documentation just use the plain GPIOE > I am fine with plain GPIOE if that's what your internal documentation uses > it would be great if you could add a comment (or at least a note in > the commit message) indicating that this is how the hardware is > designed (initially I thought this was a bug since I have no > documentation for the G12A chipset) I can add a comment > > Regards > Martin > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
HI Martin On 07/10/18 06:07, Martin Blumenstingl wrote: > Hi Linus, > > On Mon, Jul 9, 2018 at 3:35 PM Linus Walleij <linus.walleij@linaro.org> wrote: >> >> On Wed, Jul 4, 2018 at 4:48 PM Yixun Lan <yixun.lan@amlogic.com> wrote: >>> >>> This patch series try to add pinctrl driver support for >>> the Meson-G12A SoC. >>> >>> >>> Yixun Lan (3): >>> documentation: Add compatibles for Amlogic Meson G12A pin controllers >>> dt-bindings: pinctrl: meson-g12a: document pin name >>> pinctrl: meson-g12a: add pinctrl driver support >> >> Overall this looks good to me, could we get some review or ACKs >> from Beniamino, Martin and/or Carlo as an indication that everything >> seems all right before I apply the series? > I do not have any documentation for this hardware (I'm not even sure > if this is the successor to AXG/"the Audio SoCs" or rather a successor > of GXL or GXM/"the OTT/STB SoCs" - I assume it's their new OTT/STB > SoCs since G12A is mentioned here and it seems to have a GPU: [0]) > yes, it's more like a new generation of OTT/STB SoCs.. > I will try to have a look in the next few days and see if I can spot > anything obvious generally the pinctrl IP hasn't changed, so only pinctrl data need to be updated (the pin mux IP is same as AXG SoC which already explain in another thread). > not sure if Neil or Kevin have access to the documentation, so it'd be > great if they could give feedback as well > we are preparing documention to baylibre guys.. I think there is not many boards available in the public? > > Regards > Martin > > > [0] http://openlinux.amlogic.com:8000/download/doc/Linux_BSP_Kernel4.9_Buildroot_OpenLinux_Release_Notes_V20180330.pdf > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Jul 10, 2018 at 12:07 AM Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > > Hi Linus, > > On Mon, Jul 9, 2018 at 3:35 PM Linus Walleij <linus.walleij@linaro.org> wrote: > > > > On Wed, Jul 4, 2018 at 4:48 PM Yixun Lan <yixun.lan@amlogic.com> wrote: > > > > > > This patch series try to add pinctrl driver support for > > > the Meson-G12A SoC. > > > > > > > > > Yixun Lan (3): > > > documentation: Add compatibles for Amlogic Meson G12A pin controllers > > > dt-bindings: pinctrl: meson-g12a: document pin name > > > pinctrl: meson-g12a: add pinctrl driver support > > > > Overall this looks good to me, could we get some review or ACKs > > from Beniamino, Martin and/or Carlo as an indication that everything > > seems all right before I apply the series? > I do not have any documentation for this hardware (I'm not even sure > if this is the successor to AXG/"the Audio SoCs" or rather a successor > of GXL or GXM/"the OTT/STB SoCs" for those who are interested: according to [0] the marketing name of this SoC will be "A311D" - specs from the linked PDF: - CPU: Quad Cortex-A73 + Dual Cortex-A53 (max frequency: TBD) - GPU: ARM G52 MP4 (4ppc) - Memory: DDR3/4 LPDDR3/4 - Video decoding: 4K H265&VP9&AVS2 - Video Encoding: 1080P H264 H265 - HDMI-Tx: 4K2K - Ethernet: 10/100M/1000M - AV output: CVBS - IP License: Dolby, DTS W400 is the reference board for this SoC, it comes with: - EMMC - WIFI AP6398S - DDR 2GB if I had to guess then I would say it's the successor of the GXL (or GXM?) family Regards Martin [0] http://openlinux.amlogic.com:8000/download/doc/Amlogic_A311D_Buildroot_Preview_Release_Notes_V20180706.pdf -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Martin see my comments On 07/14/2018 10:36 PM, Martin Blumenstingl wrote: > On Tue, Jul 10, 2018 at 12:07 AM Martin Blumenstingl > <martin.blumenstingl@googlemail.com> wrote: >> >> Hi Linus, >> >> On Mon, Jul 9, 2018 at 3:35 PM Linus Walleij <linus.walleij@linaro.org> wrote: >>> >>> On Wed, Jul 4, 2018 at 4:48 PM Yixun Lan <yixun.lan@amlogic.com> wrote: >>>> >>>> This patch series try to add pinctrl driver support for >>>> the Meson-G12A SoC. >>>> >>>> >>>> Yixun Lan (3): >>>> documentation: Add compatibles for Amlogic Meson G12A pin controllers >>>> dt-bindings: pinctrl: meson-g12a: document pin name >>>> pinctrl: meson-g12a: add pinctrl driver support >>> >>> Overall this looks good to me, could we get some review or ACKs >>> from Beniamino, Martin and/or Carlo as an indication that everything >>> seems all right before I apply the series? >> I do not have any documentation for this hardware (I'm not even sure >> if this is the successor to AXG/"the Audio SoCs" or rather a successor >> of GXL or GXM/"the OTT/STB SoCs" > for those who are interested: according to [0] the marketing name of > this SoC will be "A311D" - specs from the linked PDF: A311D is the G12B SoC series This pinctrl patch is target for G12A for now, but can be very easily extend to support G12B.. > - CPU: Quad Cortex-A73 + Dual Cortex-A53 (max frequency: TBD) > - GPU: ARM G52 MP4 (4ppc) > - Memory: DDR3/4 LPDDR3/4 > - Video decoding: 4K H265&VP9&AVS2 > - Video Encoding: 1080P H264 H265 > - HDMI-Tx: 4K2K > - Ethernet: 10/100M/1000M > - AV output: CVBS > - IP License: Dolby, DTS > > W400 is the reference board for this SoC, it comes with: > - EMMC > - WIFI AP6398S > - DDR 2GB > yes, W400 for G12B, and U200 for G12A > if I had to guess then I would say it's the successor of the GXL (or > GXM?) family > Yes, successor of GXL > > Regards > Martin > > > [0] http://openlinux.amlogic.com:8000/download/doc/Amlogic_A311D_Buildroot_Preview_Release_Notes_V20180706.pdf > > . > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html