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[0/4] mtd: spi-nor: aspeed: introduce optimized settings for fast reads

Message ID 20180622121417.6762-1-clg@kaod.org
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Series mtd: spi-nor: aspeed: introduce optimized settings for fast reads | expand

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Cédric Le Goater June 22, 2018, 12:14 p.m. UTC 
Hello,

This series adds support for faster reads on the Aspeed SoC SMC (FMC
and SPI) controllers using a SPI timing calibration sequence to select
the best settings.
 
Thanks,

C.

 Changes since last time this was discussed (06/2017)

 - the "spi-max-frequency" property is now used to cap the results
 - chips on FMC controllers are also covered

Cédric Le Goater (4):
  mtd: spi-nor: aspeed: use command mode for reads
  mtd: spi-nor: aspeed: add support for SPI dual IO read mode
  mtd: spi-nor: aspeed: retrieve the ABH clock frequency
  mtd: spi-nor: aspeed: introduce optimized settings for fast reads

 drivers/mtd/spi-nor/aspeed-smc.c | 294 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 281 insertions(+), 13 deletions(-)