Message ID | 1526558413-23113-1-git-send-email-dmeyer@gigaio.com |
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Return-Path: <linux-pci-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gigaio.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gigaio-com.20150623.gappssmtp.com header.i=@gigaio-com.20150623.gappssmtp.com header.b="Vea6Wfmk"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40mqdD0Vp5z9s0q for <incoming@patchwork.ozlabs.org>; Thu, 17 May 2018 22:00:48 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751367AbeEQMAp (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Thu, 17 May 2018 08:00:45 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:43805 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750779AbeEQMAo (ORCPT <rfc822; linux-pci@vger.kernel.org>); Thu, 17 May 2018 08:00:44 -0400 Received: by mail-pg0-f68.google.com with SMTP id p8-v6so1734007pgq.10 for <linux-pci@vger.kernel.org>; Thu, 17 May 2018 05:00:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gigaio-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=ziCowFvN8OIOYuE3X1ugYZCggQeqjf4M5WjTfkfcReY=; b=Vea6WfmkVnTZjQEj54ipa7irEEayNshBP2ltMPxZgd9TqDYXJNkHOOt2UxPFzeNBxK TQ0PIleSp+PPvyTEDpEWt7MoKm2qTEz5TxtMuelglusl1tGfxtzOX9CWiTZdpo0Eba4g HIbdJGB44T+AKlAeMUGw8c3b/SfoK6aQXba7whZz0U37l91XO92/Z2nBR8XXyKx9cBU7 MhJtbx+ch1MmTGjSypf/APnKHsxd5Lw8RsT0E4PBo8//onp2n8KRTo+x0sktdjjyc8wx 25dZbB8MIuik+Kejelrh9n133Nko5wYzyRSPUnhpEsvPMWdTQKHaEctAoFl9TbMZ0BNI 638Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ziCowFvN8OIOYuE3X1ugYZCggQeqjf4M5WjTfkfcReY=; b=nl6BIae1tHkr6QRfuRWqnK+sD6pLiyYFWazX0VhiDD5vQpITQADIPPt5CQRXjs9HDi UfKlAlQucmeaLtkEocKZclmYlsAY/6Mt+TI9koIHC6upEPkeLpZqlOe2BgUW1t6VYa/J tAk8QNWfKiKGusTwGMobJE2X2bzBb/pc/8riqirM5x/+Nv0cgyIbm3CnPIiVRZ8ih32b CQNOKYYLLVTGR5mEGd+zoz8kfaMnDn0LegFuyMb/7lUQi9Kq7/BqKOUl6egrDdyFRSZa w6FqhV1I1eF6OmtM+ML7NSjWmPKsxkA9uz/PdBKDwN+cfrzxee+o49DRo9Jwg5R7+fBI 6iEQ== X-Gm-Message-State: ALKqPwckIC1HnOUQEuq/e7ZyX2xPkEdtRlmC1GIRZ9s7m3EQj46nRELK GvNoZ1itRmXnfjTdjq3MTN6b0Q== X-Google-Smtp-Source: AB8JxZo50pL9YlnNtwU4zvYYTBm7LV8U7uRs93ftcwwaynhBLkAWUep7sBxVT+qrvsbnavOrDYp+7w== X-Received: by 2002:a62:6883:: with SMTP id d125-v6mr4974418pfc.26.1526558444190; Thu, 17 May 2018 05:00:44 -0700 (PDT) Received: from stryx3.evonexus.local ([69.43.204.50]) by smtp.gmail.com with ESMTPSA id r90-v6sm13052643pfg.122.2018.05.17.05.00.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 17 May 2018 05:00:43 -0700 (PDT) From: dmeyer@gigaio.com To: logang@deltatee.com, kurt.schwemmer@microsemi.com, linux-pci@vger.kernel.org, linux-ntb@googlegroups.com Cc: bhelgaas@google.com, jdmason@kudzu.us, dave.jiang@intel.com, allenbh@gmail.com, linux-kernel@vger.kernel.org, Doug Meyer <dmeyer@gigaio.com> Subject: [PATCH 0/2] PCI Quirk Patchset for Microsemi Switchtec NTB Date: Thu, 17 May 2018 05:00:11 -0700 Message-Id: <1526558413-23113-1-git-send-email-dmeyer@gigaio.com> X-Mailer: git-send-email 1.8.3.1 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: <linux-pci.vger.kernel.org> X-Mailing-List: linux-pci@vger.kernel.org |
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PCI Quirk Patchset for Microsemi Switchtec NTB
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From: Doug Meyer <dmeyer@gigaio.com> This patch series addresses the need to be able to run Microsemi Switchtec NTB configurations with the IOMMU in the hosts turned on. Because of the nature PCI Quirk implementation, it was preferable to migrate the Microsemi PCI vendor and device definitions to the Linux canonical location. Logan Gunthorpe requested that this migration be done as a separate patch in a set, and so this patch series was created as shown here. The first patch encapsulates the movement of constants from switchtec.h to pci_ids.h, with commensurate changes to the source files. This patch is not dependent on any other work. The second patch is the PCI quirk implementation itself, and is completely dependent upon the first patch in this series. Testing of the quirk was done on with a 2-host x86-64 system with all combinations of IOMMU off/on. The ntb_perf module was used as test stimulus. Doug Meyer (2): NTB: Migrate PCI Constants to Cannonical PCI Header NTB: PCI Quirk to Enable Switchtec NT Functionality with IOMMU On drivers/ntb/hw/mscc/ntb_hw_switchtec.c | 3 +- drivers/pci/quirks.c | 196 +++++++++++++++++++++++++++++++++ drivers/pci/switch/switchtec.c | 15 ++- include/linux/pci_ids.h | 32 ++++++ include/linux/switchtec.h | 4 - 5 files changed, 237 insertions(+), 13 deletions(-)