Message ID | 1526037444-22876-1-git-send-email-ego@linux.vnet.ibm.com (mailing list archive) |
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Return-Path: <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org> X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40j72S5rw8z9s2L for <patchwork-incoming@ozlabs.org>; Fri, 11 May 2018 21:21:20 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 40j72S4HB4zF2HP for <patchwork-incoming@ozlabs.org>; Fri, 11 May 2018 21:21:20 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=ego@linux.vnet.ibm.com; receiver=<UNKNOWN>) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40j6yM4FmRzF2Fq for <linuxppc-dev@lists.ozlabs.org>; Fri, 11 May 2018 21:17:44 +1000 (AEST) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w4BB9uth010734 for <linuxppc-dev@lists.ozlabs.org>; Fri, 11 May 2018 07:17:41 -0400 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2hw8c7crm1-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for <linuxppc-dev@lists.ozlabs.org>; Fri, 11 May 2018 07:17:41 -0400 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 11 May 2018 07:17:38 -0400 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w4BBHbGH45613246 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 11 May 2018 11:17:37 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9E5C011204B; Fri, 11 May 2018 07:17:34 -0400 (EDT) Received: from sofia.ibm.com (unknown [9.77.201.139]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP id 4B94E112047; Fri, 11 May 2018 07:17:34 -0400 (EDT) Received: by sofia.ibm.com (Postfix, from userid 1000) id C369D2E2E0D; Fri, 11 May 2018 16:47:31 +0530 (IST) From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com> To: Michael Ellerman <mpe@ellerman.id.au>, Benjamin Herrenschmidt <benh@kernel.crashing.org>, Michael Neuling <mikey@neuling.org>, Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>, Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>, Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>, Balbir Singh <bsingharora@gmail.com>, "Oliver O'Halloran" <oohall@gmail.com>, Nicholas Piggin <npiggin@gmail.com> Subject: [PATCH 0/2] powerpc: Scheduler optimization for POWER9 bigcores Date: Fri, 11 May 2018 16:47:22 +0530 X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 x-cbid: 18051111-0048-0000-0000-0000026B93CF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00009005; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000259; SDB=6.01030698; UDB=6.00526774; IPR=6.00809829; MB=3.00021044; MTD=3.00000008; XFM=3.00000015; UTC=2018-05-11 11:17:40 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18051111-0049-0000-0000-000045153E7B Message-Id: <1526037444-22876-1-git-send-email-ego@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-05-11_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1805110107 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Linux on PowerPC Developers Mail List <linuxppc-dev.lists.ozlabs.org> List-Unsubscribe: <https://lists.ozlabs.org/options/linuxppc-dev>, <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe> List-Archive: <http://lists.ozlabs.org/pipermail/linuxppc-dev/> List-Post: <mailto:linuxppc-dev@lists.ozlabs.org> List-Help: <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help> List-Subscribe: <https://lists.ozlabs.org/listinfo/linuxppc-dev>, <mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe> Cc: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" <linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org> |
Series |
powerpc: Scheduler optimization for POWER9 bigcores
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From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com> Hi, A pair of IBM POWER9 SMT4 cores can be fused together to form a big-core with 8 SMT threads. This can be discovered via the "ibm,thread-groups" CPU property in the device tree which will indicate which group of threads that share the L1 cache, translation cache and instruction data flow. If there are multiple such group of threads, then the core is a big-core. Furthermore, the thread-ids of such a big-core is obtained by interleaving the thread-ids of the component SMT4 cores. Eg: Threads in the pair of component SMT4 cores of an interleaved big-core are numbered {0,2,4,6} and {1,3,5,7} respectively. On such a big-core, when multiple tasks are scheduled to run on the big-core, we get the best performance when the tasks are spread across the pair of SMT4 cores. The Linux scheduler has a feature called "ASYM_SMT" which will bias the load-balancing of the tasks on the smaller numbered threads in the core. On an big-core whose threads are interleavings of the threads of the small cores, enabling ASYM_SMT automatically results in spreading the tasks uniformly across the associated pair of SMT4 cores. In this patchset, we detect if the cores are big-cores with interleaved threads. If so, we enable ASYM_SMT feature at the SMT-sched domain. Experimental results for ebizzy with 2 threads, bound to a single big-core show a marked improvement with this patchset over the 4.17-rc3 vanilla kernel. The results of 100 such runs, for 4.17-rc3 vanilla kernel and 4.17-rc3 + this_patchset are as follows. 4.17-rc3 vanilla: ================================================ ebizzy records/s :# samples: Histogram ================================================= [1000000 - 2000000] : 14 : ### [2000000 - 3000000] : 13 : ### [3000000 - 4000000] : 15 : #### [4000000 - 5000000] : 2 : # [5000000 - 6000000] : 56 : ############ ================================================= 4.17-rc3 vanilla + this_patchset ================================================= ebizzy records/s :# samples: Histogram ================================================= [1000000 - 2000000] : 0 : # [2000000 - 3000000] : 14 : ### [3000000 - 4000000] : 0 : # [4000000 - 5000000] : 1 : # [5000000 - 6000000] : 85 : ################## ================================================= This patchset contains two patchset. The first patch detects the presence of big-cores with interleaved threads. The second patch adds the ASYM_SMT bit to the flags the SMT-sched domain when interleaved big-cores are detected. Gautham R. Shenoy (2): powerpc: Detect the presence of big-core with interleaved threads powerpc: Enable ASYM_SMT on interleaved big-core systems arch/powerpc/include/asm/cputhreads.h | 8 +++-- arch/powerpc/kernel/setup-common.c | 63 +++++++++++++++++++++++++++++++++-- arch/powerpc/kernel/smp.c | 2 +- 3 files changed, 67 insertions(+), 6 deletions(-)