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[v8,0/5] scsi: ufs: add ufs driver code for Hisilicon Hi3660 SoC

Message ID 20180213101412.5717-1-liwei213@huawei.com
Headers show
Series scsi: ufs: add ufs driver code for Hisilicon Hi3660 SoC | expand

Message

liwei (CM) Feb. 13, 2018, 10:14 a.m. UTC 
This patchset adds driver support for UFS for Hi3660 SoC. It is verified on HiKey960 board.

Li Wei (5):
  scsi: ufs: add Hisilicon ufs driver code
  dt-bindings: scsi: ufs: add document for hisi-ufs
  arm64: dts: add ufs dts node
  arm64: defconfig: enable configs for Hisilicon ufs
  arm64: defconfig: enable f2fs and squashfs

 Documentation/devicetree/bindings/ufs/ufs-hisi.txt |  37 ++
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi          |  19 +
 arch/arm64/configs/defconfig                       |  11 +
 drivers/scsi/ufs/Kconfig                           |   9 +
 drivers/scsi/ufs/Makefile                          |   1 +
 drivers/scsi/ufs/ufs-hisi.c                        | 623 +++++++++++++++++++++
 drivers/scsi/ufs/ufs-hisi.h                        | 116 ++++
 7 files changed, 816 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/ufs/ufs-hisi.txt
 create mode 100644 drivers/scsi/ufs/ufs-hisi.c
 create mode 100644 drivers/scsi/ufs/ufs-hisi.h

Comments

Martin K. Petersen Feb. 15, 2018, 11:51 p.m. UTC | #1 
Li,

> This patchset adds driver support for UFS for Hi3660 SoC. It is
> verified on HiKey960 board.
>
> Li Wei (5):
>   scsi: ufs: add Hisilicon ufs driver code
>   dt-bindings: scsi: ufs: add document for hisi-ufs
>   arm64: dts: add ufs dts node
>   arm64: defconfig: enable configs for Hisilicon ufs
>   arm64: defconfig: enable f2fs and squashfs

Is the intent for this series to go through the SCSI tree? If so, I'll
need some acks from the ARM maintainers for the dt/platform changes.
Wei Xu March 8, 2018, 4:57 p.m. UTC | #2 
Hi Li Wei,

On 2018/2/13 10:14, Li Wei wrote:
> arm64: dts: add ufs node for Hisilicon.
> 
> Signed-off-by: Li Wei <liwei213@huawei.com>

Fine to me. Thanks!

Acked-by: Wei Xu <xuwei5@hisilicon.com>

Best Regards,
Wei

> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index ab0b95ba5ae5..d0dfa97fdad1 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -904,6 +904,25 @@
>  			reset-gpios = <&gpio11 1 0 >;
>  		};
>  
> +		/* UFS */
> +		ufs: ufs@ff3b0000 {
> +			compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1";
> +			/* 0: HCI standard */
> +			/* 1: UFS SYS CTRL */
> +			reg = <0x0 0xff3b0000 0x0 0x1000>,
> +				<0x0 0xff3b1000 0x0 0x1000>;
> +			interrupt-parent = <&gic>;
> +			interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
> +				<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
> +			clock-names = "ref_clk", "phy_clk";
> +			/* offset: 0x84; bit: 12 */
> +			/* offset: 0x84; bit: 7  */
> +			resets = <&crg_rst 0x84 12>,
> +				<&crg_rst 0x84 7>;
> +			reset-names = "rst", "assert";
> +		};
> +
>  		/* SD */
>  		dwmmc1: dwmmc1@ff37f000 {
>  			#address-cells = <1>;
> 

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