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[0/7] Initial Allwinner H6 support

Message ID 20180106041813.46256-1-icenowy@aosc.io
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Series Initial Allwinner H6 support | expand

Message

Icenowy Zheng Jan. 6, 2018, 4:18 a.m. UTC
This patchset adds initial support for the Allwinner H6 SoC.

It's quite different from earlier Allwinner SoCs. For example, the
memory map is refactored, and the CCU is rearranged. It's also the first
Allwinner SoC with PCI Express interface, and the second one with USB
3.0 (the first one is A80).

This patchset adds the most basical support for it, including the main pin
controller, the main CCU and the basical device tree.

Icenowy Zheng (7):
  pinctrl: sunxi: add support for pin controllers without bus gate
  pinctrl: sunxi: support pin controllers with holes among IRQ banks
  pinctrl: sunxi: add support for the Allwinner H6 main pin controller
  clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks
  clk: sunxi-ng: add support for the Allwinner H6 CCU
  arm64: allwinner: h6: add the basical Allwinner H6 DTSI file
  arm64: allwinner: h6: add support for Pine H64 board

 .../devicetree/bindings/clock/sunxi-ccu.txt        |    1 +
 .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   |    4 +-
 arch/arm64/boot/dts/allwinner/Makefile             |    1 +
 .../boot/dts/allwinner/sun50i-h6-pine-h64.dts      |   66 ++
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi       |  214 ++++
 drivers/clk/sunxi-ng/Kconfig                       |    5 +
 drivers/clk/sunxi-ng/Makefile                      |    1 +
 drivers/clk/sunxi-ng/ccu-sun50i-h6.c               | 1206 ++++++++++++++++++++
 drivers/clk/sunxi-ng/ccu-sun50i-h6.h               |   63 +
 drivers/clk/sunxi-ng/ccu_nkmp.c                    |   20 +-
 drivers/clk/sunxi-ng/ccu_nkmp.h                    |    2 +
 drivers/pinctrl/sunxi/Kconfig                      |    4 +
 drivers/pinctrl/sunxi/Makefile                     |    1 +
 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c          |  679 +++++++++++
 drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c          |    4 +-
 drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c          |    4 +-
 drivers/pinctrl/sunxi/pinctrl-sunxi.c              |   46 +-
 drivers/pinctrl/sunxi/pinctrl-sunxi.h              |   42 +-
 include/dt-bindings/clock/sun50i-h6-ccu.h          |  159 +++
 include/dt-bindings/reset/sun50i-h6-ccu.h          |  110 ++
 20 files changed, 2595 insertions(+), 37 deletions(-)
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
 create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
 create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-h6.c
 create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-h6.h
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c
 create mode 100644 include/dt-bindings/clock/sun50i-h6-ccu.h
 create mode 100644 include/dt-bindings/reset/sun50i-h6-ccu.h

Comments

Linus Walleij Jan. 11, 2018, 9:36 a.m. UTC | #1
On Sat, Jan 6, 2018 at 5:18 AM, Icenowy Zheng <icenowy@aosc.io> wrote:

> This patchset adds initial support for the Allwinner H6 SoC.

Can I apply the pin control patches without the clock patches?

Also waiting for Maxime and/or Chen-Yu to provide some review
before merging this.

Yours,
Linus Walleij
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Icenowy Zheng Jan. 11, 2018, 9:38 a.m. UTC | #2
在 2018年1月11日星期四 CST 下午5:36:39,Linus Walleij 写道:
> On Sat, Jan 6, 2018 at 5:18 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> > This patchset adds initial support for the Allwinner H6 SoC.
> 
> Can I apply the pin control patches without the clock patches?

I think it's OK.

Note: on H6 now the pin controller do not depend on
the CCU at all -- it only needs two oscillators now.

> 
> Also waiting for Maxime and/or Chen-Yu to provide some review
> before merging this.
> 
> Yours,
> Linus Walleij


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