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[0/2] ti-pipe3: PCIe x2 lane mode configuration in dra72

Message ID 20171219094540.18432-1-kishon@ti.com
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Series ti-pipe3: PCIe x2 lane mode configuration in dra72 | expand

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Kishon Vijay Abraham I Dec. 19, 2017, 9:45 a.m. UTC 
DRA72 uses the same pipe3 PHY for the 2nd lane of PCIE and USB3 PHY.
By default it is configured to be used as USB3 PHY and some special
configuration has to be done inorder to use it for the 2nd lane of PCIE.

This series adds a new dt property and the configuration required to
enable 2nd lane of PCIE.

Kishon Vijay Abraham I (2):
  dt-bindings: phy: ti-pipe3: Add dt binding to use USB3 PHY for PCIe
  phy: ti-pipe3: configure usb3 phy to be used as pcie phy

 Documentation/devicetree/bindings/phy/ti-phy.txt |  2 +
 drivers/phy/ti/phy-ti-pipe3.c                    | 47 +++++++++++++++++++++---
 2 files changed, 43 insertions(+), 6 deletions(-)