| Message ID | 1510492674-12786-1-git-send-email-vidyas@nvidia.com |
|---|---|
| Headers | show |
| Series | Add ASPM-L1 Substates support for Tegra | expand |
On Sun, Nov 12, 2017 at 06:47:51PM +0530, Vidya Sagar wrote: > Tegra chips T210 and T186 support ASPM-L1 Substates (i.e. L1.1 and L1.2) > This patch series > - applies fixups to reflect correct capability values for > T_cmrt (Common Mode Restore Time) and > T_pwr_on (Power On) > and adjusts counter values for 19.2 MHz of clk_m > - applies fixup specific to T210 to avoid unnecessary wake ups from L1.2 state > - enables advertisement of ASPM-L1 support in capability register > > NOTE:- This version of patch series drops a patch (that was present till V2 series) > that introduces an API for host controller drivers to specify LTR_L1.2_THRESHOLD > value as more details and better understanding of spec is required to program > LTR_L1.2_THRESHOLD value. > It also reorders patches to appropriately have software fixups and advertisement > of capabilities > > PCIe - ASPM L1 Sub States spec > https://pcisig.com/sites/default/files/specification_documents/ECN_L1_PM_Substates_with_CLKREQ_31_May_2013_Rev10a.pdf > > Testing Done on T210 and T186 > - ASPM-L1: > Verified ASPM-L1 enablement by selecting PCIEASPM_POWERSAVE config > With the help of Tegra rootport's internal counter registers, confirmed > link entry in and out of ASPM-L1 state using USB3.0 add-on card, NVMe and NIC > cards > - ASPM-L1 SubStates: > Verified ASPM-L1 Substates enablement by selecting PCIEASPM_POWER_SUPERSAVE config > Confirmed link's entry into L1SS using Westren Digital NVMe card (with Sandisk > Controller) using Tegra rootport's internal counter registers > > Vidya Sagar (3): > PCI: tegra: Apply sw fixups to support ASPM-L1 Sub-States > PCI: tegra: fixups to avoid unnecessary wakeup from ASPM-L1.2 > PCI: tegra: Enable ASPM-L1 capability advertisement > > drivers/pci/host/pci-tegra.c | 93 ++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 93 insertions(+) Looks like these don't apply to an upstream kernel. Do you have any other patches in your tree that would cause the context to be different? I see a couple of fields in struct tegra_pcie_soc that aren't in the driver upstream and I didn't find any patches on the list that add them. Can you rebase this on top of a recent linux-next or -rc and resend? Also, if the series depends on any other patches that have been sent to the list but haven't been merged yet, please include a reference to the patchwork or email thread for the dependencies. Thanks, Thierry
On Thursday 14 December 2017 08:29 PM, Thierry Reding wrote: > On Sun, Nov 12, 2017 at 06:47:51PM +0530, Vidya Sagar wrote: >> Tegra chips T210 and T186 support ASPM-L1 Substates (i.e. L1.1 and L1.2) >> This patch series >> - applies fixups to reflect correct capability values for >> T_cmrt (Common Mode Restore Time) and >> T_pwr_on (Power On) >> and adjusts counter values for 19.2 MHz of clk_m >> - applies fixup specific to T210 to avoid unnecessary wake ups from L1.2 state >> - enables advertisement of ASPM-L1 support in capability register >> >> NOTE:- This version of patch series drops a patch (that was present till V2 series) >> that introduces an API for host controller drivers to specify LTR_L1.2_THRESHOLD >> value as more details and better understanding of spec is required to program >> LTR_L1.2_THRESHOLD value. >> It also reorders patches to appropriately have software fixups and advertisement >> of capabilities >> >> PCIe - ASPM L1 Sub States spec >> https://pcisig.com/sites/default/files/specification_documents/ECN_L1_PM_Substates_with_CLKREQ_31_May_2013_Rev10a.pdf >> >> Testing Done on T210 and T186 >> - ASPM-L1: >> Verified ASPM-L1 enablement by selecting PCIEASPM_POWERSAVE config >> With the help of Tegra rootport's internal counter registers, confirmed >> link entry in and out of ASPM-L1 state using USB3.0 add-on card, NVMe and NIC >> cards >> - ASPM-L1 SubStates: >> Verified ASPM-L1 Substates enablement by selecting PCIEASPM_POWER_SUPERSAVE config >> Confirmed link's entry into L1SS using Westren Digital NVMe card (with Sandisk >> Controller) using Tegra rootport's internal counter registers >> >> Vidya Sagar (3): >> PCI: tegra: Apply sw fixups to support ASPM-L1 Sub-States >> PCI: tegra: fixups to avoid unnecessary wakeup from ASPM-L1.2 >> PCI: tegra: Enable ASPM-L1 capability advertisement >> >> drivers/pci/host/pci-tegra.c | 93 ++++++++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 93 insertions(+) > Looks like these don't apply to an upstream kernel. Do you have any > other patches in your tree that would cause the context to be different? > I see a couple of fields in struct tegra_pcie_soc that aren't in the > driver upstream and I didn't find any patches on the list that add them. > > Can you rebase this on top of a recent linux-next or -rc and resend? > Also, if the series depends on any other patches that have been sent to > the list but haven't been merged yet, please include a reference to the > patchwork or email thread for the dependencies. > > Thanks, > Thierry Yes. These patches depend on https://patchwork.ozlabs.org/project/linux-pci/list/?series=10924 series, but this series is being under reviewed getting modified frequently. I'll re-post my patches once this series reaches a stable state.