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[v3,0/2] Implement support for inverted serial TX/RX on i.MX

Message ID 20200212163538.3006-1-ghilliard@kopismobile.com
Headers show
Series Implement support for inverted serial TX/RX on i.MX | expand

Message

George Hilliard Feb. 12, 2020, 4:35 p.m. UTC 
This peripheral has dedicated control bits that flip input/output
signals before handing them off to the OS.  This is useful on my
hardware because the UART is connected to an RS-422 transceiver with the
+/- pins hooked up backward.  Instead of a hack flipping all the bits
before sending them, the hardware can do it for free.

Revision 3 sets *and* clears the bit as necessary during startup.  It
also moves init before transmit is enabled.

George Hilliard (2):
  dt-bindings: serial: document fsl,inverted-tx and -rx options
  tty: imx serial: Implement support for reversing TX and RX polarity

 .../bindings/serial/fsl-imx-uart.txt          |  4 +++
 drivers/tty/serial/imx.c                      | 29 +++++++++++++++----
 2 files changed, 27 insertions(+), 6 deletions(-)

Comments

Uwe Kleine-König Feb. 12, 2020, 8:47 p.m. UTC | #1 
On Wed, Feb 12, 2020 at 10:35:38AM -0600, George Hilliard wrote:
> The peripheral has support for inverting its input and/or output
> signals.  This is useful if the hardware flips polarity of the
> peripheral's signal, such as swapped +/- pins on an RS-422 transceiver,
> or an inverting level shifter.  Add support for these control registers
> via the device tree binding.
> 
> Signed-off-by: George Hilliard <ghilliard@kopismobile.com>
> ---
> v1..v2: Remove confidentiality spam
> v2..v3: Set *and* clear register, and do it before TX enable
> 
>  drivers/tty/serial/imx.c | 28 +++++++++++++++++++++++-----
>  1 file changed, 23 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
> index 0c6c63166250..205627bcad66 100644
> --- a/drivers/tty/serial/imx.c
> +++ b/drivers/tty/serial/imx.c
> @@ -195,6 +195,8 @@ struct imx_port {
>  	unsigned int		have_rtscts:1;
>  	unsigned int		have_rtsgpio:1;
>  	unsigned int		dte_mode:1;
> +	unsigned int		inverted_tx:1;
> +	unsigned int		inverted_rx:1;
>  	struct clk		*clk_ipg;
>  	struct clk		*clk_per;
>  	const struct imx_uart_data *devdata;
> @@ -1335,7 +1337,7 @@ static int imx_uart_startup(struct uart_port *port)
>  	int retval, i;
>  	unsigned long flags;
>  	int dma_is_inited = 0;
> -	u32 ucr1, ucr2, ucr4;
> +	u32 ucr1, ucr2, ucr3, ucr4;
>  
>  	retval = clk_prepare_enable(sport->clk_per);
>  	if (retval)
> @@ -1390,8 +1392,22 @@ static int imx_uart_startup(struct uart_port *port)
>  	ucr4 = imx_uart_readl(sport, UCR4) & ~UCR4_OREN;
>  	if (!sport->dma_is_enabled)
>  		ucr4 |= UCR4_OREN;
> +	if (sport->inverted_rx)
> +		ucr4 |= UCR4_INVR;
> +	else
> +		ucr4 &= ~UCR4_INVR;

Maybe clear UCR4_INVR in the same way as UCR4_OREN is cleared just
above?

>  	imx_uart_writel(sport, ucr4, UCR4);
>  
> +	/*
> +	 * configure tx polarity before enabling tx
> +	 */
> +	ucr3 = imx_uart_readl(sport, UCR3);
> +	if (sport->inverted_tx)
> +		ucr3 |= UCR3_INVT;
> +	else
> +		ucr3 &= ~UCR3_INVT;
> +	imx_uart_writel(sport, ucr3, UCR3);
> +
>  	ucr2 = imx_uart_readl(sport, UCR2) & ~UCR2_ATEN;
>  	ucr2 |= (UCR2_RXEN | UCR2_TXEN);
>  	if (!sport->have_rtscts)
> @@ -1405,10 +1421,6 @@ static int imx_uart_startup(struct uart_port *port)
>  	imx_uart_writel(sport, ucr2, UCR2);
>  
>  	if (!imx_uart_is_imx1(sport)) {

If this complete if block would be moved up, you only need to write this
register once.

> -		u32 ucr3;
> -
> -		ucr3 = imx_uart_readl(sport, UCR3);
> -
>  		ucr3 |= UCR3_DTRDEN | UCR3_RI | UCR3_DCD;
>  
>  		if (sport->dte_mode)

Best regards
Uwe