[cris-decc0,0/14] A set of compare-elimination-fixes.
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Message ID 202002120647.01C6l4Zi026181@ignucius.se.axis.com
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  • A set of compare-elimination-fixes.
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Hans-Peter Nilsson Feb. 12, 2020, 6:47 a.m. UTC
I just rebased and updated the vendors/axis branch
axis/cris-decc0 with the following commits, which should bring
back compare-elimination results to that of cc0 on master.

With the exception of the bit-test patterns (btst / btstq which
is more of a "combine" matter), everything is centered around
working together with the "cmpelim" pass with the help of
define_subst attributes.  Regression test-cases have already
been committed to master (the recently committed pr93372-*
tests), covering all patterns but not all CCmodes or conditions.
All patches regtested for cris-elf, at a smaller granularity
than these partially squashed commits, but naturally with
regressions for the pr93372-* testcases until the last one of
these commits.

No performance tests yet though, but I expect axis/cris-decc0 to
be a win over master, since as I've mentioned before, I see
improvements in register-allocation already in libgcc, which
should get back what's lost in all the special patterns I
deleted.  I haven't looked into the cause, but it shouldn't
surprise anyone that there's some noticeable goodies inside
something to the effect of #ifndef HAVE_cc0, even with IRA.
(Conversion to LRA is way down on the TODO list.)

It's a bit unfortunate that so many pattern names are now
obfuscated with the define_subst_attr attributes (like
"<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"
instead of "zero_extend<mode>si2"), but I'll take that single
line change in patterns over duplicated or triplicated patterns.

brgds, H-P

Comments

Eric Botcazou Feb. 12, 2020, 9:31 a.m. UTC | #1
> I just rebased and updated the vendors/axis branch
> axis/cris-decc0 with the following commits, which should bring
> back compare-elimination results to that of cc0 on master.

Nice work!  An example of transition done properly...

> With the exception of the bit-test patterns (btst / btstq which
> is more of a "combine" matter), everything is centered around
> working together with the "cmpelim" pass with the help of
> define_subst attributes.

Feel free to further tweak the cmpelim pass if need be; I did it for the 
Visium so there is a precedent. :-)

> No performance tests yet though, but I expect axis/cris-decc0 to
> be a win over master, since as I've mentioned before, I see
> improvements in register-allocation already in libgcc, which
> should get back what's lost in all the special patterns I
> deleted.  I haven't looked into the cause, but it shouldn't
> surprise anyone that there's some noticeable goodies inside
> something to the effect of #ifndef HAVE_cc0, even with IRA.
> (Conversion to LRA is way down on the TODO list.)

For the Visium, the transition was a win overall, with sporadic regressions in 
delay slot filling.  The transition to LRA looks more problematic.