| Message ID | 1579795970-22319-1-git-send-email-alain.volmat@st.com |
|---|---|
| Headers | show |
| Series | i2c: i2c-stm32f7: enhance FastModePlus support | expand |
Hello Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Thanks On 1/23/20 5:12 PM, Alain Volmat wrote: > Defer the initial enabling of the Fast Mode Plus bits after the > stm32f7_i2c_setup_timing call in probe function in order to avoid > enabling them if speed is downgraded. > Clear & restore the Fast Mode Plus bits in the suspend/resume > handlers of the driver. > > Signed-off-by: Alain Volmat <alain.volmat@st.com> > --- > drivers/i2c/busses/i2c-stm32f7.c | 48 +++++++++++++++++++++++++++++++++------- > 1 file changed, 40 insertions(+), 8 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index 844a22d64aa8..1a3b3fa582ff 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -303,6 +303,8 @@ struct stm32f7_i2c_msg { > * @dma: dma data > * @use_dma: boolean to know if dma is used in the current transfer > * @regmap: holds SYSCFG phandle for Fast Mode Plus bits > + * @regmap_reg: register address for setting Fast Mode Plus bits > + * @regmap_mask: mask for Fast Mode Plus bits in set register > * @wakeup_src: boolean to know if the device is a wakeup source > */ > struct stm32f7_i2c_dev { > @@ -326,6 +328,8 @@ struct stm32f7_i2c_dev { > struct stm32_i2c_dma *dma; > bool use_dma; > struct regmap *regmap; > + u32 regmap_reg; > + u32 regmap_mask; > bool wakeup_src; > }; > > @@ -1815,12 +1819,25 @@ static int stm32f7_i2c_unreg_slave(struct i2c_client *slave) > return 0; > } > > +static int stm32f7_i2c_write_fm_plus_bits(struct stm32f7_i2c_dev *i2c_dev, > + bool enable) > +{ > + if (i2c_dev->speed != STM32_I2C_SPEED_FAST_PLUS || > + IS_ERR_OR_NULL(i2c_dev->regmap)) { > + /* Optional */ > + return 0; > + } > + > + return regmap_update_bits(i2c_dev->regmap, i2c_dev->regmap_reg, > + i2c_dev->regmap_mask, > + enable ? i2c_dev->regmap_mask : 0); > +} > + > static int stm32f7_i2c_setup_fm_plus_bits(struct platform_device *pdev, > struct stm32f7_i2c_dev *i2c_dev) > { > struct device_node *np = pdev->dev.of_node; > int ret; > - u32 reg, mask; > > i2c_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg-fmp"); > if (IS_ERR(i2c_dev->regmap)) { > @@ -1828,15 +1845,17 @@ static int stm32f7_i2c_setup_fm_plus_bits(struct platform_device *pdev, > return 0; > } > > - ret = of_property_read_u32_index(np, "st,syscfg-fmp", 1, ®); > + ret = of_property_read_u32_index(np, "st,syscfg-fmp", 1, > + &i2c_dev->regmap_reg); > if (ret) > return ret; > > - ret = of_property_read_u32_index(np, "st,syscfg-fmp", 2, &mask); > + ret = of_property_read_u32_index(np, "st,syscfg-fmp", 2, > + &i2c_dev->regmap_mask); > if (ret) > return ret; > > - return regmap_update_bits(i2c_dev->regmap, reg, mask, mask); > + return 0; > } > > static u32 stm32f7_i2c_func(struct i2c_adapter *adap) > @@ -1914,9 +1933,6 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > &clk_rate); > if (!ret && clk_rate >= 1000000) { > i2c_dev->speed = STM32_I2C_SPEED_FAST_PLUS; > - ret = stm32f7_i2c_setup_fm_plus_bits(pdev, i2c_dev); > - if (ret) > - goto clk_free; > } else if (!ret && clk_rate >= 400000) { > i2c_dev->speed = STM32_I2C_SPEED_FAST; > } else if (!ret && clk_rate >= 100000) { > @@ -1976,6 +1992,15 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > if (ret) > goto clk_free; > > + if (i2c_dev->speed == STM32_I2C_SPEED_FAST_PLUS) { > + ret = stm32f7_i2c_setup_fm_plus_bits(pdev, i2c_dev); > + if (ret) > + goto clk_free; > + ret = stm32f7_i2c_write_fm_plus_bits(i2c_dev, 1); > + if (ret) > + goto clk_free; > + } > + > adap = &i2c_dev->adap; > i2c_set_adapdata(adap, i2c_dev); > snprintf(adap->name, sizeof(adap->name), "STM32F7 I2C(%pa)", > @@ -2000,7 +2025,7 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > if (ret != -EPROBE_DEFER) > dev_err(&pdev->dev, > "Failed to request dma error %i\n", ret); > - goto clk_free; > + goto fmp_clear; > } > > if (i2c_dev->wakeup_src) { > @@ -2054,6 +2079,9 @@ static int stm32f7_i2c_probe(struct platform_device *pdev) > i2c_dev->dma = NULL; > } > > +fmp_clear: > + stm32f7_i2c_write_fm_plus_bits(i2c_dev, 0); > + > clk_free: > clk_disable_unprepare(i2c_dev->clk); > > @@ -2086,6 +2114,8 @@ static int stm32f7_i2c_remove(struct platform_device *pdev) > i2c_dev->dma = NULL; > } > > + stm32f7_i2c_write_fm_plus_bits(i2c_dev, 0); > + > clk_disable_unprepare(i2c_dev->clk); > > return 0; > @@ -2133,6 +2163,7 @@ stm32f7_i2c_regs_backup(struct stm32f7_i2c_dev *i2c_dev) > backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2); > backup_regs->pecr = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR); > backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR); > + stm32f7_i2c_write_fm_plus_bits(i2c_dev, 0); > > pm_runtime_put_sync(i2c_dev->dev); > > @@ -2165,6 +2196,7 @@ stm32f7_i2c_regs_restore(struct stm32f7_i2c_dev *i2c_dev) > writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1); > writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2); > writel_relaxed(backup_regs->pecr, i2c_dev->base + STM32F7_I2C_PECR); > + stm32f7_i2c_write_fm_plus_bits(i2c_dev, 1); > > pm_runtime_put_sync(i2c_dev->dev); > >
Hi Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Thanks On 1/23/20 5:12 PM, Alain Volmat wrote: > Add a new stm32mp15 specific compatible to handle FastMode+ > registers handling which is different on the stm32mp15 compared > to the stm32f7 or stm32h7. > Indeed, on the stm32mp15, the FastMode+ set and clear registers > are separated while on the other platforms (F7 or H7) the control > is done in a unique register. > > Signed-off-by: Alain Volmat <alain.volmat@st.com> > --- > drivers/i2c/busses/i2c-stm32f7.c | 41 +++++++++++++++++++++++++++++++++------- > 1 file changed, 34 insertions(+), 7 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index 1a3b3fa582ff..6bee9eca789f 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -223,6 +223,7 @@ struct stm32f7_i2c_spec { > * @fall_time: Fall time (ns) > * @dnf: Digital filter coefficient (0-16) > * @analog_filter: Analog filter delay (On/Off) > + * @fmp_clr_offset: Fast Mode Plus clear register offset from set register > */ > struct stm32f7_i2c_setup { > enum stm32_i2c_speed speed; > @@ -232,6 +233,7 @@ struct stm32f7_i2c_setup { > u32 fall_time; > u8 dnf; > bool analog_filter; > + u32 fmp_clr_offset; > }; > > /** > @@ -303,8 +305,9 @@ struct stm32f7_i2c_msg { > * @dma: dma data > * @use_dma: boolean to know if dma is used in the current transfer > * @regmap: holds SYSCFG phandle for Fast Mode Plus bits > - * @regmap_reg: register address for setting Fast Mode Plus bits > - * @regmap_mask: mask for Fast Mode Plus bits in set register > + * @regmap_sreg: register address for setting Fast Mode Plus bits > + * @regmap_creg: register address for clearing Fast Mode Plus bits > + * @regmap_mask: mask for Fast Mode Plus bits > * @wakeup_src: boolean to know if the device is a wakeup source > */ > struct stm32f7_i2c_dev { > @@ -328,7 +331,8 @@ struct stm32f7_i2c_dev { > struct stm32_i2c_dma *dma; > bool use_dma; > struct regmap *regmap; > - u32 regmap_reg; > + u32 regmap_sreg; > + u32 regmap_creg; > u32 regmap_mask; > bool wakeup_src; > }; > @@ -386,6 +390,14 @@ static const struct stm32f7_i2c_setup stm32f7_setup = { > .analog_filter = STM32F7_I2C_ANALOG_FILTER_ENABLE, > }; > > +static const struct stm32f7_i2c_setup stm32mp15_setup = { > + .rise_time = STM32F7_I2C_RISE_TIME_DEFAULT, > + .fall_time = STM32F7_I2C_FALL_TIME_DEFAULT, > + .dnf = STM32F7_I2C_DNF_DEFAULT, > + .analog_filter = STM32F7_I2C_ANALOG_FILTER_ENABLE, > + .fmp_clr_offset = 0x40, > +}; > + > static inline void stm32f7_i2c_set_bits(void __iomem *reg, u32 mask) > { > writel_relaxed(readl_relaxed(reg) | mask, reg); > @@ -1822,15 +1834,26 @@ static int stm32f7_i2c_unreg_slave(struct i2c_client *slave) > static int stm32f7_i2c_write_fm_plus_bits(struct stm32f7_i2c_dev *i2c_dev, > bool enable) > { > + int ret; > + > if (i2c_dev->speed != STM32_I2C_SPEED_FAST_PLUS || > IS_ERR_OR_NULL(i2c_dev->regmap)) { > /* Optional */ > return 0; > } > > - return regmap_update_bits(i2c_dev->regmap, i2c_dev->regmap_reg, > - i2c_dev->regmap_mask, > - enable ? i2c_dev->regmap_mask : 0); > + if (i2c_dev->regmap_sreg == i2c_dev->regmap_creg) > + ret = regmap_update_bits(i2c_dev->regmap, > + i2c_dev->regmap_sreg, > + i2c_dev->regmap_mask, > + enable ? i2c_dev->regmap_mask : 0); > + else > + ret = regmap_write(i2c_dev->regmap, > + enable ? i2c_dev->regmap_sreg : > + i2c_dev->regmap_creg, > + i2c_dev->regmap_mask); > + > + return ret; > } > > static int stm32f7_i2c_setup_fm_plus_bits(struct platform_device *pdev, > @@ -1846,10 +1869,13 @@ static int stm32f7_i2c_setup_fm_plus_bits(struct platform_device *pdev, > } > > ret = of_property_read_u32_index(np, "st,syscfg-fmp", 1, > - &i2c_dev->regmap_reg); > + &i2c_dev->regmap_sreg); > if (ret) > return ret; > > + i2c_dev->regmap_creg = i2c_dev->regmap_sreg + > + i2c_dev->setup.fmp_clr_offset; > + > ret = of_property_read_u32_index(np, "st,syscfg-fmp", 2, > &i2c_dev->regmap_mask); > if (ret) > @@ -2271,6 +2297,7 @@ static const struct dev_pm_ops stm32f7_i2c_pm_ops = { > > static const struct of_device_id stm32f7_i2c_match[] = { > { .compatible = "st,stm32f7-i2c", .data = &stm32f7_setup}, > + { .compatible = "st,stm32mp15-i2c", .data = &stm32mp15_setup}, > {}, > }; > MODULE_DEVICE_TABLE(of, stm32f7_i2c_match); >
Hi Alain, thanks for the patch. A few comments: > @@ -303,6 +303,8 @@ struct stm32f7_i2c_msg { > * @dma: dma data > * @use_dma: boolean to know if dma is used in the current transfer > * @regmap: holds SYSCFG phandle for Fast Mode Plus bits > + * @regmap_reg: register address for setting Fast Mode Plus bits > + * @regmap_mask: mask for Fast Mode Plus bits in set register > * @wakeup_src: boolean to know if the device is a wakeup source > */ > struct stm32f7_i2c_dev { > @@ -326,6 +328,8 @@ struct stm32f7_i2c_dev { > struct stm32_i2c_dma *dma; > bool use_dma; > struct regmap *regmap; > + u32 regmap_reg; > + u32 regmap_mask; Is this really a descriptive naming? From looking at the code, 'syscfg_reg' or 'fmp_reg' sound more suitable to me? > +{ > + if (i2c_dev->speed != STM32_I2C_SPEED_FAST_PLUS || > + IS_ERR_OR_NULL(i2c_dev->regmap)) { > + /* Optional */ > + return 0; > + } No brackets needed here. > - ret = of_property_read_u32_index(np, "st,syscfg-fmp", 2, &mask); > + ret = of_property_read_u32_index(np, "st,syscfg-fmp", 2, > + &i2c_dev->regmap_mask); > if (ret) > return ret; > > - return regmap_update_bits(i2c_dev->regmap, reg, mask, mask); > + return 0; Can be shortened now to return of_property_read_u32_index(...); > + ret = stm32f7_i2c_write_fm_plus_bits(i2c_dev, 1); The type of the last parameter is bool, so using 'true/false' instead of '1/0' is a tad more readable, I think. Regards, Wolfram
On Thu, Jan 23, 2020 at 05:12:48PM +0100, Alain Volmat wrote: > Add a new stm32mp15 specific compatible to handle FastMode+ > registers handling which is different on the stm32mp15 compared > to the stm32f7 or stm32h7. > Indeed, on the stm32mp15, the FastMode+ set and clear registers > are separated while on the other platforms (F7 or H7) the control > is done in a unique register. > > Signed-off-by: Alain Volmat <alain.volmat@st.com> Looks good (patch 2 as well). You'd only need to adapt the naming if you change the naming in patch 1, obviously.
Hi Alain On 1/23/20 5:12 PM, Alain Volmat wrote: > This serie enhance Fast Mode Plus support in the i2c-stm32f7 driver > (support suspend/resume) and add the support for the stm32mp15 SoC > that has new syscfg bits. > > Alain Volmat (5): > i2c: i2c-stm32f7: disable/restore Fast Mode Plus bits in low power > modes > dt-bindings: i2c: i2c-stm32f7: add st,stm32mp15-i2c compatible > i2c: i2c-stm32f7: add a new st,stm32mp15-i2c compatible > ARM: dts: stm32: use st,stm32mp15-i2c compatible for stm32mp151 > ARM: dts: stm32: add Fast Mode Plus info in I2C nodes of stm32mp151 > > .../devicetree/bindings/i2c/st,stm32-i2c.yaml | 6 +- > arch/arm/boot/dts/stm32mp151.dtsi | 18 ++++-- > drivers/i2c/busses/i2c-stm32f7.c | 75 +++++++++++++++++++--- > 3 files changed, 83 insertions(+), 16 deletions(-) > patches [4][5] (DT) applied on stm32-next. Thanks. Alex
This serie enhance Fast Mode Plus support in the i2c-stm32f7 driver (support suspend/resume) and add the support for the stm32mp15 SoC that has new syscfg bits. Alain Volmat (5): i2c: i2c-stm32f7: disable/restore Fast Mode Plus bits in low power modes dt-bindings: i2c: i2c-stm32f7: add st,stm32mp15-i2c compatible i2c: i2c-stm32f7: add a new st,stm32mp15-i2c compatible ARM: dts: stm32: use st,stm32mp15-i2c compatible for stm32mp151 ARM: dts: stm32: add Fast Mode Plus info in I2C nodes of stm32mp151 .../devicetree/bindings/i2c/st,stm32-i2c.yaml | 6 +- arch/arm/boot/dts/stm32mp151.dtsi | 18 ++++-- drivers/i2c/busses/i2c-stm32f7.c | 75 +++++++++++++++++++--- 3 files changed, 83 insertions(+), 16 deletions(-)