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[U-Boot,v3,000/108] x86: Add initial support for apollolake

Message ID 20191021033146.216265-1-sjg@chromium.org
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Series x86: Add initial support for apollolake | expand

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Simon Glass Oct. 21, 2019, 3:29 a.m. UTC 
Apollolake is an Intel SoC generation aimed at relatively low-end embedded
systems. It was released in 2016 but has become more popular recently with
some embedded boards using it.

This series adds support for apollolake. As an example it adds an
implementation of chromebook_coral (a large range of Chromebooks released
in 2017).

The series provides enough support to boot to a prompt. with LCD display,
storage, USB, EC and keyboard.

Since this is the first time U-Boot has used FSP2 there is quite a bit of
refactoring needed.

This series is available at u-boot-dm/coral-working

Changes in v3:
- Ad FSP-S support
- Add CONFIG_TPL_X86_ASSUME_CPUID to reduce code size
- Add Chrome OS EC support
- Add FSP-S and VBT also
- Add MMC, video, USB configs
- Add SPL condition to the option
- Add VBT signature
- Add a driver for APL SPI for TPL (using of-platdata)
- Add a proper SPI node and make the SPI flash node a child
- Add a proper implementation of fsp_notify
- Add a weak function to avoid errors on other platforms
- Add an APL_SPI_FLASH_BOOT option to enable non-mmap boot
- Add an extra size parameter to the find_next_mrc_cache() function
- Add an fsp: tag
- Add bootstage support
- Add bootstage timing for memory-mapped reads
- Add bootstage timing for reading vbt
- Add fsp_locate_fsp to locate an fsp component
- Add fspm_done() hook
- Add fspm_done() hook to handle FSP-S wierdness (it breaks SPI flash)
- Add help to CONFIG_FIT and don't make it 'default y'
- Add more documentation
- Add snapshot/restore for IRQs
- Add spi alias in device tree
- Add structures for FSP-S also
- Add support for FSP-S component and VBT
- Add support for of-platdata for TPL
- Add the missing header file
- Add two more defines for the CPU driver
- Add two more operations to IRQ
- Adjust fast_spi_cache_bios_region() to avoid using SPI driver
- Change Fast-SPI driver into a helper file used by ICH SPI
- Change the sandbox test from ITSS to IRQ
- Convert code to use hex increased of decimal
- Disable the bootcommand since it does nothing useful on coral
- Don't allow BOOT_FROM_FAST_SPI_FLASH with FSP-S
- Don't enable SPI flash in TPL by default
- Don't imply SPI flash either
- Don't include write() and erase() in TPL
- Drop CONFIG_SPL_NET_SUPPORT
- Drop calls to x86_cpu_init_f(), x86_cpu_reinit_f()
- Drop patch '86: timer: Reduce timer code size in TPL on Intel CPUs'
- Drop patch 'dm: core: Don't include ofnode functions with of-platdata'
- Drop patch 'spi: sandbox: Add a test driver for sandbox SPI flash'
- Drop patch 'spl: Allow SPL/TPL to use of-platdata without libfdt'
- Drop patch 'x86: apollolake: Add definitions for the Intel Fast SPI interface'
- Drop patch 'x86: timer: Set up the timer in timer_early_get_count()'
- Drop struct fsp_usp_header as it is now in the API file
- Drop unnecessary #else part of CONFIG_HAVE_MICROCODE
- Drop unneeded Kconfig file
- Drop unused code in lpc_configure_pads()
- Enable video and USB3
- Expand comments for BOOT_FROM_FAST_SPI_FLASH
- Fix 'autoallocation' typo
- Fix 'err-%d' typo
- Fix build error when debug UART is disabled
- Fix build errors in sandbox_spl, etc
- Fix mixed case in GPIO defines
- Fix the incorrect value of CPU_ADDR_BITS
- Fix value of LPC_BC_LE
- Improve wording in commit message
- Init the p2sb before the northbridge since the latter so it can use GPIOs
- Merge in patch "x86: Add support for booting from Fast SPI"
- Move an additional error handling fix from a future patch
- Move line related to variable-cache into the next patch
- Move location of fast_spi.h header file
- Move mtrr_add_request() call into this patch
- Move mtrr_add_request() call to next patch
- Move pad programming into the hostbridge to reduce TPL device-tree size
- Move the function to a common file instead of duplicating it
- Move the get_mmap() method from the SPI_FLASH to the SPI uclass
- Move the mrccache_get_region() change into this patch
- Move write_pirq_routing_table() to avoid 64-bit build error
- Only supress the 'MAC address from ROM' warning on sandbox
- Reduce amount of early-pad data in TPL
- Rename power-mgr uclass to acpi-pmc
- Reorder file so that write() and erase() are together
- Rework how pads configuration is defined in TPL and SPL
- Rework patch now that the original CONFIG_IS_ENABLED() problems is fixed
- Rewrite commit message
- Set boot_loader_tolum_size to 0
- Set the environment variables at runtime to avoid other warnings
- Shorten log_msg_ret() calls since the function name is always printed
- Simplify types for fsp_locate_fsp()
- Support TPL without CONFIG_TPL_SPI_SUPPORT
- Support TPL without CONFIG_TPL_SPI_SUPPORT (reduces code size)
- Support bootstage timing
- Switch mmap to use SPI instead of SPI flash
- Tidy up the pad settings in the device tree
- Update commit message
- Update device type to pci_dev_t
- Update example error message to better show the intended purpose
- Update mrccache livetree patch to just convert to livetree
- Update the 'fsp' command for FSP2, instead of disabling it
- Use a zero-based tsc timer
- Use pci_get_devfn()
- Use the IRQ uclass instead of ITSS
- Use the IRQ uclass instead of creating a new ITSS uclass
- Use the LPSS code from a separate file

Changes in v2:
- Change 'queensbay' to 'baytrail' in help
- Drop probe() function
- Fix 'proides' typo
- Fix the Kconfig condition to avoid build errors on snow
- Implement set_spi_protect()
- Use SPI mmap() instead of SPI flash
- s/board device/boot device/

Simon Glass (108):
  binman: Correct symbol calculation with non-zero image base
  binman: Add support for Intel FSP-S
  binman: Add support for Intel FSP-T
  binman: Fix up comment in intel-fsp-m
  binman: Add a library to access binman entries
  dm: gpio: Allow control of GPIO uclass in SPL
  dm: core: Fix offset_to_ofnode() with invalid offset
  dm: pci: Delay auto-config until after relocation
  dm: pci: Move pci_get_devfn() into a common file
  net: Move the checksum functions to lib/
  i2c: Tidy up designware PCI support
  spl: Correct priority selection for image loaders
  x86: spi: Add helper functions for Intel Fast SPI
  spi: Add support for memory-mapped flash
  dm: doc: Correct of-platdata driver name
  fdt: Show the preprocessed .dts file on error
  RFC: sandbox: net: Suppress the MAC-address warnings
  Revert "RFC: sandbox: net: Suppress the MAC-address warnings"
  spl: Add a size check for TPL
  sandbox: pci: Create a new sandbox_pci_read_bar() function
  x86: timer: Set up the timer in timer_early_get_count()
  x86: timer: Use a separate flag for whether timer is inited
  x86: timer: Allow a timer base of 0
  x86: spl: Support init of a PUNIT
  x86: tpl: Add a fake PCI bus
  x86: timer: Reduce timer code size in TPL on Intel CPUs
  x86: Drop unnecessary cpu code for TPL
  x86: Drop unnecessary interrupt code for TPL
  x86: Add a CPU init function for TPL
  x86: Move CPU init to before spl_init()
  x86: Don't print CPU info in TPL
  x86: Quieten TPL's jump_to_image_no_args()
  x86: power: Add an ACPI PMC uclass
  x86: sandbox: Add a PMC emulator and test
  x86: power: Add a 'pmc' command
  pci: Add support for p2sb uclass
  sandbox: Add PCI driver and test for p2sb
  x86: Move UCLASS_IRQ into a separate file
  sandbox: Add a test for IRQ
  x86: Define the SPL image start
  x86: Reduce mrccache record alignment size
  x86: Correct mrccache find_next_mrc_cache() calculation
  x86: Adjust mrccache_get_region() to use livetree
  x86: Adjust mrccache_get_region() to support get_mmap()
  x86: Add a new global_data member for the cache record
  x86: Tidy up error handling in mrccache_save()
  x86: Update mrccache to support multiple caches
  x86: Add mrccache support for a 'variable' cache
  x86: Move fsp_prepare_mrc_cache() to fsp1 directory
  x86: Set the DRAM banks to reflect real location
  x86: Set up the MTRR for SDRAM
  x86: Don't imply libfdt or SPI flash in TPL
  x86: Allow removal of standard PCH drivers
  x86: Allow interrupt to happen once
  x86: fsp: Make graphics support common to FSP1/2
  x86: fsp: Correct wrong header inlude in fsp_support.c
  x86: fsp: Add FSP2 base support
  x86: fsp: Set up an MTRR for the graphics frame buffer
  x86: fsp: Add a new arch_fsp_init_r() hook
  x86: fsp: Allow remembering the location of FSP-S
  x86: fsp: Make the notify API call common
  x86: Don't include the BIOS emulator in TPL
  x86: Add an option to include a FIT
  x86: Add support for newer CAR schemes
  x86: Disable microcode section for FSP2
  x86: Update the fsp command for FSP2
  x86: Update .dtsi file for FSP2
  x86: Add an option to control the position of U-Boot
  x86: Add an option to control the position of SPL
  x86: Add an fdtmap and image-header
  x86: Don't repeat microcode in U-Boot if not needed
  x86: Separate out U-Boot and device tree in ROM image
  x86: Make MSR_PKG_POWER_SKU common
  spi: Correct operations check in dm_spi_xfer()
  x86: spi: Don't enable SPI_FLASH_BAR by default
  spi: ich: Move init function just above probe()
  spi: ich: Move the protection/lockdown code into a function
  spi: ich: Convert to livetree
  spi: ich: Fix header order
  spi: ich: Various small tidy-ups
  spi: ich: Add mmio_base to struct ich_spi_platdata
  spi: ich: Correct max-size bug in ich_spi_adjust_size()
  spi: ich: Support of-platdata for fast-spi
  spi: ich: Support hardware sequencing
  spi: ich: Add support for get_mmap() method
  spi: ich: Add TPL support
  spi: ich: Add Apollolake support
  mtd: spi: Export spi_flash_std_probe()
  x86: apollolake: Add basic IO addresses
  x86: apollolake: Add PMC driver
  x86: apollolake: Add low-power subsystem (lpss) support
  x86: apollolake: Add UART driver
  x86: apollolake: Add GPIO driver
  i2c: designware: Add apollolake support
  x86: apollolake: Add systemagent driver
  x86: apollolake: Add hostbridge driver
  x86: apollolake: Add ITSS driver
  x86: apollolake: Add LPC driver
  x86: apollolake: Add PCH driver
  x86: apollolake: Add PUNIT driver
  x86: apollolake: Add SPL loaders
  x86: apollolake: Add a CPU driver
  x86: apollolake: Add SPL/TPL init
  x86: apollolake: Add P2SB driver
  x86: apollolake: Add Kconfig and Makefile
  x86: apollolake: Add FSP structures
  x86: apollolake: Add FSP support
  x86: Add chromebook_coral

 Kconfig                                       |   9 +-
 Makefile                                      |  10 +-
 arch/Kconfig                                  |   7 +-
 arch/arm/include/asm/omap_gpio.h              |   2 +-
 arch/arm/mach-at91/include/mach/at91sam9260.h |   2 +-
 arch/arm/mach-davinci/include/mach/gpio.h     |   2 +-
 arch/arm/mach-omap2/am33xx/board.c            |   4 +-
 arch/arm/mach-omap2/omap3/board.c             |   2 +-
 arch/arm/mach-omap2/omap5/hwinit.c            |   2 +-
 arch/sandbox/cpu/state.c                      |   1 +
 arch/sandbox/dts/sandbox.dtsi                 |  14 +
 arch/sandbox/dts/test.dts                     |  31 +
 arch/sandbox/include/asm/test.h               |  11 +
 arch/x86/Kconfig                              | 101 ++-
 arch/x86/cpu/Makefile                         |   3 +-
 arch/x86/cpu/apollolake/Kconfig               |  87 ++
 arch/x86/cpu/apollolake/Makefile              |  28 +
 arch/x86/cpu/apollolake/cpu.c                 |  51 ++
 arch/x86/cpu/apollolake/cpu_spl.c             | 278 ++++++
 arch/x86/cpu/apollolake/fsp_m.c               | 210 +++++
 arch/x86/cpu/apollolake/fsp_s.c               | 665 +++++++++++++++
 arch/x86/cpu/apollolake/gpio.c                | 735 ++++++++++++++++
 arch/x86/cpu/apollolake/hostbridge.c          | 220 +++++
 arch/x86/cpu/apollolake/itss.c                | 214 +++++
 arch/x86/cpu/apollolake/lpc.c                 | 141 ++++
 arch/x86/cpu/apollolake/lpss.c                |  31 +
 arch/x86/cpu/apollolake/p2sb.c                | 167 ++++
 arch/x86/cpu/apollolake/pch.c                 |  36 +
 arch/x86/cpu/apollolake/pmc.c                 | 216 +++++
 arch/x86/cpu/apollolake/punit.c               | 121 +++
 arch/x86/cpu/apollolake/spl.c                 | 202 +++++
 arch/x86/cpu/apollolake/systemagent.c         |  19 +
 arch/x86/cpu/apollolake/uart.c                | 141 ++++
 arch/x86/cpu/broadwell/sdram.c                |   8 +-
 arch/x86/cpu/cpu.c                            |   4 +
 arch/x86/cpu/i386/cpu.c                       |  49 +-
 arch/x86/cpu/i386/interrupt.c                 |  13 +
 arch/x86/cpu/intel_common/Makefile            |   9 +
 arch/x86/cpu/intel_common/car2.S              | 490 +++++++++++
 arch/x86/cpu/intel_common/car2_uninit.S       |  87 ++
 arch/x86/cpu/intel_common/fast_spi.c          |  73 ++
 arch/x86/cpu/irq.c                            |  13 -
 arch/x86/cpu/ivybridge/sdram.c                |   8 +-
 arch/x86/cpu/quark/dram.c                     |   8 +-
 arch/x86/cpu/start_from_spl.S                 |   1 +
 arch/x86/cpu/u-boot-spl.lds                   |   5 +-
 arch/x86/dts/Makefile                         |   1 +
 arch/x86/dts/chromebook_coral.dts             | 790 ++++++++++++++++++
 arch/x86/dts/u-boot.dtsi                      |  84 +-
 arch/x86/include/asm/arch-apollolake/cpu.h    |  27 +
 .../asm/arch-apollolake/fsp/fsp_configs.h     |  14 +
 .../asm/arch-apollolake/fsp/fsp_m_upd.h       | 123 +++
 .../asm/arch-apollolake/fsp/fsp_s_upd.h       | 292 +++++++
 .../include/asm/arch-apollolake/fsp/fsp_vpd.h |  11 +
 arch/x86/include/asm/arch-apollolake/gpio.h   | 191 +++++
 .../include/asm/arch-apollolake/gpio_apl.h    | 491 +++++++++++
 .../include/asm/arch-apollolake/gpio_defs.h   | 398 +++++++++
 arch/x86/include/asm/arch-apollolake/iomap.h  |  28 +
 arch/x86/include/asm/arch-apollolake/itss.h   |  43 +
 arch/x86/include/asm/arch-apollolake/lpc.h    |  61 ++
 arch/x86/include/asm/arch-apollolake/pch.h    |   9 +
 arch/x86/include/asm/arch-apollolake/pm.h     |  19 +
 .../include/asm/arch-apollolake/systemagent.h |  31 +
 arch/x86/include/asm/arch-apollolake/uart.h   |  17 +
 arch/x86/include/asm/arch-broadwell/cpu.h     |   1 -
 .../include/asm/arch-ivybridge/model_206ax.h  |   1 -
 arch/x86/include/asm/cpu.h                    |   1 +
 arch/x86/include/asm/fast_spi.h               |  68 ++
 arch/x86/include/asm/fsp/fsp_api.h            |  27 +
 arch/x86/include/asm/fsp/fsp_support.h        |   7 -
 arch/x86/include/asm/fsp1/fsp_api.h           |  21 +-
 arch/x86/include/asm/fsp2/fsp_api.h           |  60 ++
 arch/x86/include/asm/fsp2/fsp_internal.h      |  97 +++
 arch/x86/include/asm/global_data.h            |  25 +-
 arch/x86/include/asm/lpss.h                   |  11 +
 arch/x86/include/asm/mrccache.h               |  14 +-
 arch/x86/include/asm/msr-index.h              |   9 +-
 arch/x86/include/asm/pci.h                    |  11 +
 arch/x86/include/asm/spl.h                    |   1 +
 arch/x86/include/asm/u-boot-x86.h             |   9 +
 arch/x86/lib/Makefile                         |   2 +
 arch/x86/lib/fsp/Makefile                     |   3 +
 arch/x86/lib/fsp/fsp_common.c                 |  20 -
 arch/x86/lib/fsp/fsp_dram.c                   |  35 +-
 arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c     |   6 +-
 arch/x86/lib/fsp/fsp_support.c                |   2 +-
 arch/x86/lib/fsp1/Makefile                    |   1 -
 arch/x86/lib/fsp1/fsp_common.c                |  20 +
 arch/x86/lib/fsp1/fsp_dram.c                  |   8 +-
 arch/x86/lib/fsp2/Makefile                    |  10 +
 arch/x86/lib/fsp2/fsp_common.c                |  13 +
 arch/x86/lib/fsp2/fsp_dram.c                  |  77 ++
 arch/x86/lib/fsp2/fsp_init.c                  | 157 ++++
 arch/x86/lib/fsp2/fsp_meminit.c               |  97 +++
 arch/x86/lib/fsp2/fsp_silicon_init.c          |  52 ++
 arch/x86/lib/fsp2/fsp_support.c               | 129 +++
 arch/x86/lib/mrccache.c                       | 183 ++--
 arch/x86/lib/pirq_routing.c                   |  10 +
 arch/x86/lib/spl.c                            |  44 +
 arch/x86/lib/tpl.c                            |  37 +-
 board/freescale/imx8qm_mek/imx8qm_mek.c       |   2 +-
 board/freescale/imx8qxp_mek/imx8qxp_mek.c     |   2 +-
 board/gateworks/gw_ventana/Kconfig            |   3 +
 board/google/Kconfig                          |  15 +
 board/google/chromebook_coral/Kconfig         |  43 +
 board/google/chromebook_coral/MAINTAINERS     |   6 +
 board/google/chromebook_coral/Makefile        |   5 +
 board/google/chromebook_coral/coral.c         |  18 +
 board/toradex/apalis-imx8/apalis-imx8.c       |   2 +-
 cmd/Kconfig                                   |   8 +
 cmd/Makefile                                  |   1 +
 cmd/pmc.c                                     |  81 ++
 cmd/x86/fsp.c                                 |  59 +-
 common/board_r.c                              |  13 +
 common/spl/Kconfig                            |   8 +
 configs/chromebook_coral_defconfig            | 101 +++
 configs/chromebook_samus_tpl_defconfig        |   1 +
 configs/sandbox64_defconfig                   |   2 +
 configs/sandbox_defconfig                     |   2 +
 configs/sandbox_flattree_defconfig            |   4 +
 configs/sandbox_spl_defconfig                 |   4 +
 configs/tools-only_defconfig                  |   2 +
 doc/board/google/chromebook_coral.rst         | 238 ++++++
 doc/driver-model/of-plat.rst                  |   2 +-
 drivers/Makefile                              |   2 +
 drivers/core/uclass.c                         |   4 +-
 drivers/core/util.c                           |  20 +
 drivers/gpio/Kconfig                          |  22 +
 drivers/gpio/Makefile                         |   4 +-
 drivers/gpio/at91_gpio.c                      |   6 +-
 drivers/gpio/atmel_pio4.c                     |   2 +-
 drivers/gpio/da8xx_gpio.c                     |   6 +-
 drivers/gpio/da8xx_gpio.h                     |   2 +-
 drivers/gpio/mxc_gpio.c                       |   4 +-
 drivers/gpio/mxs_gpio.c                       |   4 +-
 drivers/gpio/omap_gpio.c                      |   6 +-
 drivers/gpio/sunxi_gpio.c                     |   8 +-
 drivers/i2c/Makefile                          |   3 +
 drivers/i2c/designware_i2c.c                  | 104 +--
 drivers/i2c/designware_i2c.h                  |  35 +
 drivers/i2c/dw_i2c_pci.c                      |  96 +++
 drivers/i2c/i2c-uclass.c                      |   6 +-
 drivers/i2c/muxes/pca954x.c                   |   4 +-
 drivers/misc/Kconfig                          |  42 +
 drivers/misc/Makefile                         |   5 +
 drivers/misc/irq-uclass.c                     |  53 ++
 drivers/misc/irq_sandbox.c                    |  55 ++
 drivers/misc/p2sb-uclass.c                    | 209 +++++
 drivers/misc/p2sb_emul.c                      | 272 ++++++
 drivers/misc/p2sb_sandbox.c                   |  44 +
 drivers/misc/sandbox_adder.c                  |  60 ++
 drivers/mmc/fsl_esdhc_imx.c                   |  13 +-
 drivers/mmc/omap_hsmmc.c                      |   2 +-
 drivers/mtd/spi/sf_probe.c                    |   2 +-
 drivers/net/designware.c                      |  10 +-
 drivers/net/designware.h                      |   4 +-
 drivers/net/fec_mxc.c                         |   6 +-
 drivers/net/fec_mxc.h                         |   2 +-
 drivers/net/mvneta.c                          |   4 +-
 drivers/net/mvpp2.c                           |   8 +-
 drivers/net/sun8i_emac.c                      |  12 +-
 drivers/pch/Kconfig                           |  18 +
 drivers/pch/Makefile                          |   4 +-
 drivers/pci/pci-aardvark.c                    |   4 +-
 drivers/pci/pci-uclass.c                      |  26 +-
 drivers/pci/pci_sandbox.c                     |   1 +
 drivers/pci/pcie_dw_mvebu.c                   |   4 +-
 drivers/power/Kconfig                         |   2 +
 drivers/power/acpi_pmc/Kconfig                |  34 +
 drivers/power/acpi_pmc/Makefile               |   6 +
 drivers/power/acpi_pmc/acpi-pmc-uclass.c      | 242 ++++++
 drivers/power/acpi_pmc/pmc_emul.c             | 246 ++++++
 drivers/power/acpi_pmc/sandbox.c              |  97 +++
 drivers/spi/Kconfig                           |   1 -
 drivers/spi/atmel_spi.c                       |  10 +-
 drivers/spi/designware_spi.c                  |   4 +-
 drivers/spi/ich.c                             | 519 +++++++++---
 drivers/spi/ich.h                             |  46 +-
 drivers/spi/sandbox_spi.c                     |  11 +
 drivers/spi/spi-uclass.c                      |  19 +-
 drivers/timer/Kconfig                         |  22 +
 drivers/timer/tsc_timer.c                     |  15 +-
 drivers/tpm/tpm2_tis_spi.c                    |   2 +-
 include/binman.h                              |  27 +
 include/bootstage.h                           |   3 +
 include/config_uncmd_spl.h                    |   1 -
 include/configs/at91-sama5_common.h           |   5 +-
 include/configs/chromebook_coral.h            |  31 +
 include/configs/gw_ventana.h                  |   1 -
 include/configs/mx6ul_14x14_evk.h             |   1 +
 include/dm/ofnode.h                           |   2 +-
 include/dm/pci.h                              |  21 +
 include/dm/uclass-id.h                        |   2 +
 include/init.h                                |  11 +
 include/irq.h                                 |  88 ++
 include/p2sb.h                                | 127 +++
 include/pci.h                                 |  12 +-
 include/power/acpi_pmc.h                      | 185 ++++
 include/spi.h                                 |  29 +-
 include/spi_flash.h                           |  12 +
 include/spl.h                                 |   4 +-
 lib/Kconfig                                   |  10 +
 lib/Makefile                                  |   3 +-
 lib/binman.c                                  |  48 ++
 lib/net_utils.c                               |  48 ++
 net/Makefile                                  |   1 -
 net/checksum.c                                |  59 --
 scripts/Makefile.lib                          |   4 +-
 scripts/Makefile.uncmd_spl                    |   1 -
 test/dm/Makefile                              |   3 +
 test/dm/irq.c                                 |  32 +
 test/dm/p2sb.c                                |  28 +
 test/dm/pmc.c                                 |  33 +
 test/dm/sf.c                                  |   9 +
 tools/binman/README.entries                   |  33 +
 tools/binman/elf.py                           |   4 +-
 tools/binman/etype/intel_fsp_m.py             |   2 +-
 tools/binman/etype/intel_fsp_s.py             |  27 +
 tools/binman/etype/intel_fsp_t.py             |  26 +
 tools/binman/ftest.py                         |  13 +
 tools/binman/test/153_intel_fsp_s.dts         |  14 +
 tools/binman/test/154_intel_fsp_t.dts         |  14 +
 tools/binman/test/u_boot_binman_syms.lds      |   2 +-
 223 files changed, 11883 insertions(+), 619 deletions(-)
 create mode 100644 arch/x86/cpu/apollolake/Kconfig
 create mode 100644 arch/x86/cpu/apollolake/Makefile
 create mode 100644 arch/x86/cpu/apollolake/cpu.c
 create mode 100644 arch/x86/cpu/apollolake/cpu_spl.c
 create mode 100644 arch/x86/cpu/apollolake/fsp_m.c
 create mode 100644 arch/x86/cpu/apollolake/fsp_s.c
 create mode 100644 arch/x86/cpu/apollolake/gpio.c
 create mode 100644 arch/x86/cpu/apollolake/hostbridge.c
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 create mode 100644 arch/x86/cpu/apollolake/lpc.c
 create mode 100644 arch/x86/cpu/apollolake/lpss.c
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 create mode 100644 arch/x86/cpu/apollolake/uart.c
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 create mode 100644 arch/x86/dts/chromebook_coral.dts
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 create mode 100644 arch/x86/include/asm/arch-apollolake/itss.h
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 create mode 100644 arch/x86/include/asm/arch-apollolake/pm.h
 create mode 100644 arch/x86/include/asm/arch-apollolake/systemagent.h
 create mode 100644 arch/x86/include/asm/arch-apollolake/uart.h
 create mode 100644 arch/x86/include/asm/fast_spi.h
 create mode 100644 arch/x86/include/asm/fsp/fsp_api.h
 create mode 100644 arch/x86/include/asm/fsp2/fsp_api.h
 create mode 100644 arch/x86/include/asm/fsp2/fsp_internal.h
 create mode 100644 arch/x86/include/asm/lpss.h
 rename arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c (95%)
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 create mode 100644 arch/x86/lib/fsp2/fsp_common.c
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 create mode 100644 arch/x86/lib/fsp2/fsp_silicon_init.c
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 create mode 100644 board/google/chromebook_coral/Kconfig
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 create mode 100644 drivers/misc/irq-uclass.c
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 create mode 100644 drivers/power/acpi_pmc/acpi-pmc-uclass.c
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 create mode 100644 include/binman.h
 create mode 100644 include/configs/chromebook_coral.h
 create mode 100644 include/dm/pci.h
 create mode 100644 include/irq.h
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 create mode 100644 include/power/acpi_pmc.h
 create mode 100644 lib/binman.c
 delete mode 100644 net/checksum.c
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 create mode 100644 tools/binman/etype/intel_fsp_s.py
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 create mode 100644 tools/binman/test/153_intel_fsp_s.dts
 create mode 100644 tools/binman/test/154_intel_fsp_t.dts

Comments

Andy Shevchenko Oct. 21, 2019, 7:55 a.m. UTC | #1 
On Mon, Oct 21, 2019 at 6:32 AM Simon Glass <sjg@chromium.org> wrote:
>
> Apollolake is an Intel SoC generation aimed at relatively low-end embedded
> systems. It was released in 2016 but has become more popular recently with
> some embedded boards using it.
>
> This series adds support for apollolake. As an example it adds an
> implementation of chromebook_coral (a large range of Chromebooks released
> in 2017).
>
> The series provides enough support to boot to a prompt. with LCD display,
> storage, USB, EC and keyboard.
>
> Since this is the first time U-Boot has used FSP2 there is quite a bit of
> refactoring needed.
>

Thanks for doing this!
Common comment, please do not limit LPSS drivers, including GPIO / pin
control, to be Appololake only.
They must be available for entire Intel Skylake family of SoCs
(basically all of them from Skylake, with maybe few exceptions).
Simon Glass Oct. 21, 2019, 10:53 p.m. UTC | #2 
Hi Andy,

On Mon, 21 Oct 2019 at 01:55, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Mon, Oct 21, 2019 at 6:32 AM Simon Glass <sjg@chromium.org> wrote:
> >
> > Apollolake is an Intel SoC generation aimed at relatively low-end embedded
> > systems. It was released in 2016 but has become more popular recently with
> > some embedded boards using it.
> >
> > This series adds support for apollolake. As an example it adds an
> > implementation of chromebook_coral (a large range of Chromebooks released
> > in 2017).
> >
> > The series provides enough support to boot to a prompt. with LCD display,
> > storage, USB, EC and keyboard.
> >
> > Since this is the first time U-Boot has used FSP2 there is quite a bit of
> > refactoring needed.
> >
>
> Thanks for doing this!
> Common comment, please do not limit LPSS drivers, including GPIO / pin
> control, to be Appololake only.
> They must be available for entire Intel Skylake family of SoCs
> (basically all of them from Skylake, with maybe few exceptions).

I have certainly put some code in intel_common, but until we have a
Skylake it is a pain to figure out what is common, etc.

Clearly the GPIO code can be common, but it is very easy to move it
when we have the next thing.

I can move GPIO and LPSS over to common, for now.

Regards,
Simon
Andy Shevchenko Oct. 22, 2019, 8:15 a.m. UTC | #3 
On Tue, Oct 22, 2019 at 1:55 AM Simon Glass <sjg@chromium.org> wrote:
> On Mon, 21 Oct 2019 at 01:55, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > On Mon, Oct 21, 2019 at 6:32 AM Simon Glass <sjg@chromium.org> wrote:

> > Thanks for doing this!
> > Common comment, please do not limit LPSS drivers, including GPIO / pin
> > control, to be Appololake only.
> > They must be available for entire Intel Skylake family of SoCs
> > (basically all of them from Skylake, with maybe few exceptions).
>
> I have certainly put some code in intel_common, but until we have a
> Skylake it is a pain to figure out what is common, etc.
>
> Clearly the GPIO code can be common, but it is very easy to move it
> when we have the next thing.
>
> I can move GPIO and LPSS over to common, for now.

Yes, please! That is exactly my concern.
Thanks!
Simon Glass Oct. 24, 2019, 3:01 p.m. UTC | #4 
Hi Andy,

On Tue, 22 Oct 2019 at 02:15, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
>
> On Tue, Oct 22, 2019 at 1:55 AM Simon Glass <sjg@chromium.org> wrote:
> > On Mon, 21 Oct 2019 at 01:55, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > > On Mon, Oct 21, 2019 at 6:32 AM Simon Glass <sjg@chromium.org> wrote:
>
> > > Thanks for doing this!
> > > Common comment, please do not limit LPSS drivers, including GPIO / pin
> > > control, to be Appololake only.
> > > They must be available for entire Intel Skylake family of SoCs
> > > (basically all of them from Skylake, with maybe few exceptions).
> >
> > I have certainly put some code in intel_common, but until we have a
> > Skylake it is a pain to figure out what is common, etc.
> >
> > Clearly the GPIO code can be common, but it is very easy to move it
> > when we have the next thing.
> >
> > I can move GPIO and LPSS over to common, for now.
>
> Yes, please! That is exactly my concern.
> Thanks!

OK. Rather than resending the whole series I think I should wait for
Bin to take a look and make this change once some of the precursor
patches have been applied.

Also what do people think about keeping the pinmux code in the GPIO
driver? Should it be renamed / moved to pinctrl?

If it would be better to resend now, let me know.

Regards,
Simon
Simon Glass Nov. 21, 2019, 1:51 p.m. UTC | #5 
Hi,

On Thu, 24 Oct 2019 at 09:01, Simon Glass <sjg@chromium.org> wrote:
>
> Hi Andy,
>
> On Tue, 22 Oct 2019 at 02:15, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> >
> > On Tue, Oct 22, 2019 at 1:55 AM Simon Glass <sjg@chromium.org> wrote:
> > > On Mon, 21 Oct 2019 at 01:55, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > > > On Mon, Oct 21, 2019 at 6:32 AM Simon Glass <sjg@chromium.org> wrote:
> >
> > > > Thanks for doing this!
> > > > Common comment, please do not limit LPSS drivers, including GPIO / pin
> > > > control, to be Appololake only.
> > > > They must be available for entire Intel Skylake family of SoCs
> > > > (basically all of them from Skylake, with maybe few exceptions).
> > >
> > > I have certainly put some code in intel_common, but until we have a
> > > Skylake it is a pain to figure out what is common, etc.
> > >
> > > Clearly the GPIO code can be common, but it is very easy to move it
> > > when we have the next thing.
> > >
> > > I can move GPIO and LPSS over to common, for now.
> >
> > Yes, please! That is exactly my concern.
> > Thanks!
>
> OK. Rather than resending the whole series I think I should wait for
> Bin to take a look and make this change once some of the precursor
> patches have been applied.
>
> Also what do people think about keeping the pinmux code in the GPIO
> driver? Should it be renamed / moved to pinctrl?
>
> If it would be better to resend now, let me know.

I'm getting ready to send v4 (currently at u-boot-dm/coral-working).

Before I do I am going to split out the GPIO driver into its own file
as it is currently part of pinctrl.

Regards,
Simon