From patchwork Fri Oct 18 19:48:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw (lists)" X-Patchwork-Id: 1179620 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-511309-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="EBenGExm"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46vxSp6X1Lz9sP7 for ; Sat, 19 Oct 2019 06:49:44 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; q=dns; s=default; b=vkUdWrK5gQIW7fRMA0TzJTZ6Bqhc7qtF071FmWI6U7aQ/sf3zg n1xUlmLhKNpzwuYZ4a5+NSoQSkcin9agXb+nFVsCcQCsa5SVGmWpMuZNDchqX3HF KOfTgksxMCObO99on0UPZIg5WTtiau5PiBZewPms5fTompXCFSJpiOwIc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; s= default; bh=FnkDaIxFhbigr435XldsaZ2U1Bo=; b=EBenGExm5vfNaECY9ckT C4JbygZJHqLmPmbIBoFkFNLbnk3AuS6fPIJ86Wp0HKHSlEGHttuK4Wrrb9IS5jlx YeMAhmD9wJ5FjdBjuImZ16SZBs8T/97CuLJM8o7Q4+oCW4DqpQCsAwQO+OiGnuxZ JIEctMoR+1pepn8gIxv0m0U= Received: (qmail 77749 invoked by alias); 18 Oct 2019 19:49:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 77538 invoked by uid 89); 18 Oct 2019 19:49:23 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-8.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, SPF_PASS autolearn=ham version=3.3.1 spammy=hunting, UD:iterators.md, iterators.md, iteratorsmd X-HELO: foss.arm.com Received: from Unknown (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 18 Oct 2019 19:49:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F9F81045; Fri, 18 Oct 2019 12:49:12 -0700 (PDT) Received: from eagle.buzzard.freeserve.co.uk (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CFD123F6C4; Fri, 18 Oct 2019 12:49:11 -0700 (PDT) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [PATCH 00/29] [arm] Rewrite DImode arithmetic support Date: Fri, 18 Oct 2019 20:48:31 +0100 Message-Id: <20191018194900.34795-1-Richard.Earnshaw@arm.com> MIME-Version: 1.0 This series of patches rewrites all the DImode arithmetic patterns for the Arm backend when compiling for Arm or Thumb2 to split the operations during expand (the thumb1 code is unchanged and cannot benefit from early splitting as we are unable to expose the carry flag). This has a number of benefits: - register allocation has more freedom to use independent registers for the upper and lower halves of the register - we can make better use of combine for spotting insn merge opportunities without needing many additional patterns that are only used for DImode - we eliminate a number of bugs in the machine description where the carry calculations were not correctly propagated by the split patterns (we mostly got away with this because the splitting previously happened only after most of the important optimization passes had been run). The patch series starts by paring back all the DImode arithmetic support to a very simple form without any splitting at all and then progressively re-implementing the patterns with early split operations. This proved to be the only sane way of untangling the existing code due to a number of latent bugs which would have been exposed if a different approach had been taken. Each patch should produce a working compiler (it did when it was originally written), though since the patch set has been re-ordered slightly there is a possibility that some of the intermediate steps may have missing test updates that are only cleaned up later. However, only the end of the series should be considered complete. I've kept the patch as a series to permit easier regression hunting should that prove necessary. R. Richard Earnshaw (29): [arm] Rip out DImode addition and subtraction splits. [arm] Perform early splitting of adddi3. [arm] Early split zero- and sign-extension [arm] Rewrite addsi3_carryin_shift_ in canonical form [arm] fix constraints on addsi3_carryin_alt2 [arm] Early split subdi3 [arm] Remove redundant DImode subtract patterns [arm] Introduce arm_carry_operation [arm] Correctly cost addition with a carry-in [arm] Correct cost calculations involving borrow for subtracts. [arm] Reduce cost of insns that are simple reg-reg moves. [arm] Implement negscc using SBC when appropriate. [arm] Add alternative canonicalizations for subtract-with-carry + shift [arm] Early split simple DImode equality comparisons [arm] Improve handling of DImode comparisions against constants. [arm] early split most DImode comparison operations. [arm] Handle some constant comparisons using rsbs+rscs [arm] Cleanup dead code - old support for DImode comparisons [arm] Handle immediate values in uaddvsi4 [arm] Early expansion of uaddvdi4. [arm] Improve code generation for addvsi4. [arm] Allow the summation result of signed add-with-overflow to be discarded. [arm] Early split addvdi4 [arm] Improve constant handling for usubvsi4. [arm] Early expansion of usubvdi4. [arm] Improve constant handling for subvsi4. [arm] Early expansion of subvdi4 [arm] Improvements to negvsi4 and negvdi4. [arm] Fix testsuite nit when compiling for thumb2 gcc/config/arm/arm-modes.def | 19 +- gcc/config/arm/arm-protos.h | 1 + gcc/config/arm/arm.c | 598 ++++- gcc/config/arm/arm.md | 2020 ++++++++++------- gcc/config/arm/iterators.md | 15 +- gcc/config/arm/predicates.md | 29 +- gcc/config/arm/thumb2.md | 8 +- .../gcc.dg/builtin-arith-overflow-3.c | 41 + gcc/testsuite/gcc.target/arm/negdi-3.c | 4 +- 9 files changed, 1757 insertions(+), 978 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/builtin-arith-overflow-3.c