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[U-Boot,RFT,v2,0/3] spi-nor: spi-nor-ids: Fix 4 Byte addressing

Message ID 20190927044329.21145-1-vigneshr@ti.com
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Series spi-nor: spi-nor-ids: Fix 4 Byte addressing | expand

Message

Raghavendra, Vignesh Sept. 27, 2019, 4:43 a.m. UTC 
n25q variants do not support stateless 4 byte addressing opcodes by default,
therefore first patch disables this flag for those parts. Second patch
adds entries for mt25q variants which are similar to n25q but supports
stateless 4 byte opcodes. Third patch adds USE_FSR flag for mt25qu512a as
flash supports flag registers

Tested on mt25qu512a variant

Simon, Euginey,

Could you test this patch series on your boards as well?

Changes since v1:
Rename newer variants as mt25*
Add a patch to enable flag register parsing for mt25qu512a


Vignesh Raghavendra (3):
  spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and
    n25q256*
  spi-nor: spi-nor-ids: Add entries for mt25q variants
  spi-nor: spi-nor-ids: Add USE_FSR flag for mt25qu512a entry

 drivers/mtd/spi/spi-nor-ids.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)