| Message ID | 20190809082947.30590-1-lokeshvutla@ti.com |
|---|---|
| Headers | show |
| Series | arm64: dts: ti: k3-j721e: Add gpio nodes | expand |
On 09/08/19 1:59 PM, Lokesh Vutla wrote: > There are 8 instances of gpio modules in main domain divided into 2 groups: > - Group1: gpio0, gpio2, gpio4, gpio6 > - Group2: gpio1, gpio3, gpio5, gpio7 > > Groups are created to provide protection between two different processor > virtual worlds. There are x gpio lines coming out of each group. Each module > in a group has equal x gpio lines pinned out. There is a top level mux for > selecting the module instance for each pin coming out of group. Exactly > one module can be selected to control the corresponding pin. This muxing > can be controlled along the pad mux configuration registers. > > Group1 pins out 128 lines(8 banks). Group 2 pins out 36 lines(2 banks). > > Add DT nodes for each module instance in the main domain. Users should > make sure that correct gpio instance is selected in their pad configuration. Reviewed-by: Keerthy <j-keerthy@ti.com> > > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 132 ++++++++++++++++++++++ > 1 file changed, 132 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index 01661c22c39d..199bc9a00b20 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -240,4 +240,136 @@ > clocks = <&k3_clks 286 0>; > clock-names = "fclk"; > }; > + > + main_gpio0: gpio@600000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00600000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <105 0>, <105 1>, <105 2>, <105 3>, > + <105 4>, <105 5>, <105 6>, <105 7>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <128>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 105 0>; > + clock-names = "gpio"; > + }; > + > + main_gpio1: gpio@601000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00601000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <106 0>, <106 1>, <106 2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <36>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 106 0>; > + clock-names = "gpio"; > + }; > + > + main_gpio2: gpio@610000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00610000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <107 0>, <107 1>, <107 2>, <107 3>, > + <107 4>, <107 5>, <107 6>, <107 7>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <128>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 107 0>; > + clock-names = "gpio"; > + }; > + > + main_gpio3: gpio@611000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00611000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <108 0>, <108 1>, <108 2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <36>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 108 0>; > + clock-names = "gpio"; > + }; > + > + main_gpio4: gpio@620000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00620000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <109 0>, <109 1>, <109 2>, <109 3>, > + <109 4>, <109 5>, <109 6>, <109 7>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <128>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 109 0>; > + clock-names = "gpio"; > + }; > + > + main_gpio5: gpio@621000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00621000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <110 0>, <110 1>, <110 2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <36>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 110 0>; > + clock-names = "gpio"; > + }; > + > + main_gpio6: gpio@630000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00630000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <111 0>, <111 1>, <111 2>, <111 3>, > + <111 4>, <111 5>, <111 6>, <111 7>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <128>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 111 0>; > + clock-names = "gpio"; > + }; > + > + main_gpio7: gpio@631000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x00631000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&main_gpio_intr>; > + interrupts = <112 0>, <112 1>, <112 2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <36>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 112 0>; > + clock-names = "gpio"; > + }; > }; >
On 09/08/19 1:59 PM, Lokesh Vutla wrote: > Similar to the gpio groups in main domain, there is one gpio group > in wakup domain with 2 module instances in it. This gpio group pins > out 84 lines(6 banks). Add DT node for these 2 gpio module instances. Reviewed-by: Keerthy <j-keerthy@ti.com> > > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> > --- > .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > index e616c2481f51..555dc7b7aedc 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi > @@ -87,4 +87,38 @@ > ti,sci-dst-id = <14>; > ti,sci-rm-range-girq = <0x5>; > }; > + > + wkup_gpio0: gpio@42110000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x42110000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&wkup_gpio_intr>; > + interrupts = <113 0>, <113 1>, <113 2>, > + <113 3>, <113 4>, <113 5>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <84>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 113 0>; > + clock-names = "gpio"; > + }; > + > + wkup_gpio1: gpio@42100000 { > + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; > + reg = <0x0 0x42100000 0x0 0x100>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-parent = <&wkup_gpio_intr>; > + interrupts = <114 0>, <114 1>, <114 2>, > + <114 3>, <114 4>, <114 5>; > + interrupt-controller; > + #interrupt-cells = <2>; > + ti,ngpio = <84>; > + ti,davinci-gpio-unbanked = <0>; > + power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 114 0>; > + clock-names = "gpio"; > + }; > }; >
On 09/08/19 1:59 PM, Lokesh Vutla wrote: > There are 10 gpio instances inside SoC with 3 groups as below: > - Group1: main_gpio0, main_gpio2, main_gpio4, main_gpio6 > - Group2: main_gpio1, main_gpio3, main_gpio5, main_gpio7 > - Group3: wkup_gpio0, wkup_gpio1 > > Only one instance can be used in each group at a time. So use main_gpio0, > main_gpio1 and wkup_gpio0 for the current linux context and mark other > gpio nodes as disabled. Reviewed-by: Keerthy <j-keerthy@ti.com> > > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> > --- > .../dts/ti/k3-j721e-common-proc-board.dts | 28 +++++++++++++++++++ > 1 file changed, 28 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > index 63b47b839388..509579ca3db2 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > @@ -52,3 +52,31 @@ > /* UART not brought out */ > status = "disabled"; > }; > + > +&main_gpio2 { > + status = "disabled"; > +}; > + > +&main_gpio3 { > + status = "disabled"; > +}; > + > +&main_gpio4 { > + status = "disabled"; > +}; > + > +&main_gpio5 { > + status = "disabled"; > +}; > + > +&main_gpio6 { > + status = "disabled"; > +}; > + > +&main_gpio7 { > + status = "disabled"; > +}; > + > +&wkup_gpio1 { > + status = "disabled"; > +}; >
On 09/08/19 1:59 PM, Lokesh Vutla wrote: > From: Nikhil Devshatwar <nikhil.nd@ti.com> > > Common processor board for K3 J721E platform has two push buttons > namely SW10 and SW11. > Add a gpio-keys device node to model them as input keys in Linux. > Add required pinmux nodes to set GPIO pins as input. Reviewed-by: Keerthy <j-keerthy@ti.com> > > Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com> > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> > --- > .../dts/ti/k3-j721e-common-proc-board.dts | 37 +++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > index 509579ca3db2..d2894d55fbbe 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts > @@ -6,12 +6,49 @@ > /dts-v1/; > > #include "k3-j721e-som-p0.dtsi" > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > > / { > chosen { > stdout-path = "serial2:115200n8"; > bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; > }; > + > + gpio_keys: gpio-keys { > + compatible = "gpio-keys"; > + autorepeat; > + pinctrl-names = "default"; > + pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>; > + > + sw10: sw10 { > + label = "GPIO Key USER1"; > + linux,code = <BTN_0>; > + gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>; > + }; > + > + sw11: sw11 { > + label = "GPIO Key USER2"; > + linux,code = <BTN_1>; > + gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>; > + }; > + }; > +}; > + > +&main_pmx0 { > + sw10_button_pins_default: sw10_button_pins_default { > + pinctrl-single,pins = < > + J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */ > + >; > + }; > +}; > + > +&wkup_pmx0 { > + sw11_button_pins_default: sw11_button_pins_default { > + pinctrl-single,pins = < > + J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */ > + >; > + }; > }; > > &wkup_uart0 { >
Tero, On 09/08/19 1:59 PM, Lokesh Vutla wrote: > This series adds gpio nodes for J721E SoC and enable gpio keys > in J72E common process board. > > Tested Boot log: https://pastebin.ubuntu.com/p/P6QqmZYtSC/ > > This series depends on Power-domain cells update series: > https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=15210 Can you merge the patches 2-6? Thanks and regards, Lokesh
This series adds gpio nodes for J721E SoC and enable gpio keys in J72E common process board. Tested Boot log: https://pastebin.ubuntu.com/p/P6QqmZYtSC/ This series depends on Power-domain cells update series: https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=152109 Lokesh Vutla (5): dt-bindings: gpio: davinci: Add new compatible for J721E SoCs arm64: dts: ti: k3-j721e: Add gpio nodes in main domain arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain arm64: dts: ti: k3-j721e-common-proc-board: Disable unused gpio modules dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E Nikhil Devshatwar (1): arm64: dts: k3-j721e: Add gpio-keys on common processor board .../devicetree/bindings/gpio/gpio-davinci.txt | 1 + .../dts/ti/k3-j721e-common-proc-board.dts | 65 +++++++++ arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 132 ++++++++++++++++++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 34 +++++ include/dt-bindings/pinctrl/k3.h | 3 + 5 files changed, 235 insertions(+)