From patchwork Tue Jul 9 13:09:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qii Wang X-Patchwork-Id: 1129773 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 45jjN06LkVz9sBF for ; Tue, 9 Jul 2019 23:09:52 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726977AbfGINJv (ORCPT ); Tue, 9 Jul 2019 09:09:51 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:45673 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726046AbfGINJv (ORCPT ); Tue, 9 Jul 2019 09:09:51 -0400 X-UUID: a7011a74a7d04a94baa0edb48571cdc2-20190709 X-UUID: a7011a74a7d04a94baa0edb48571cdc2-20190709 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 872568423; Tue, 09 Jul 2019 21:09:46 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 9 Jul 2019 21:09:44 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 9 Jul 2019 21:09:44 +0800 From: Qii Wang To: CC: , , , , , , , , , , , , Subject: [PATCH v3 0/2] Add MediaTek I3C master controller driver Date: Tue, 9 Jul 2019 21:09:20 +0800 Message-ID: <1562677762-24067-1-git-send-email-qii.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series are based on 5.2-rc1, we provide two patches to support MediaTek I3C master controller. Main changes compared to v2: --modify the description of clock and interrupt in bindings --use correct cells for I2C device in bindings Main changes compared to v1: --remove clock-div, let clock driver handle it --let sample_cnt and step_cnt start from two Qii Wang (2): dt-bindings: i3c: Document MediaTek I3C master bindings i3c: master: Add driver for MediaTek IP .../devicetree/bindings/i3c/mtk,i3c-master.txt | 48 + drivers/i3c/master/Kconfig | 10 + drivers/i3c/master/Makefile | 1 + drivers/i3c/master/i3c-master-mtk.c | 1239 ++++++++++++++++++++ 4 files changed, 1298 insertions(+) create mode 100644 Documentation/devicetree/bindings/i3c/mtk,i3c-master.txt create mode 100644 drivers/i3c/master/i3c-master-mtk.c