Message ID | 20190524153253.28564-1-digetx@gmail.com |
---|---|
Headers | show |
Series | NVIDIA Tegra clocksource driver improvements | expand |
On Fri, May 24, 2019 at 06:32:45PM +0300, Dmitry Osipenko wrote: > Hello, > > This series primarily unifies the driver code across all Tegra SoC > generations. In a result the clocksources are allocated per-CPU on > older Tegra's and have a higher rating than the arch-timer, the newer > Tegra210 is getting support for microsecond clocksource and the driver's > code is getting much cleaner. Note that arch-timer usage is discouraged on > all Tegra's due to the time jitter caused by the CPU frequency scaling. I think the limitations are more as follows: Chip timer suffers cpu dvfs jitter can wakeup from cc7 T20 us-timer No Yes T20 twd timer Yes No? T30 us-timer No Yes T30 twd timer Yes No? T114 us-timer No Yes T114 arch timer No Yes T124 us-timer No Yes T124 arch timer No Yes T210 us-timer No Yes T210 arch timer No No T210 clk_m timer No Yes right? Peter.
31.05.2019 11:26, Peter De Schrijver пишет: > On Fri, May 24, 2019 at 06:32:45PM +0300, Dmitry Osipenko wrote: >> Hello, >> >> This series primarily unifies the driver code across all Tegra SoC >> generations. In a result the clocksources are allocated per-CPU on >> older Tegra's and have a higher rating than the arch-timer, the newer >> Tegra210 is getting support for microsecond clocksource and the driver's >> code is getting much cleaner. Note that arch-timer usage is discouraged on >> all Tegra's due to the time jitter caused by the CPU frequency scaling. > > I think the limitations are more as follows: > > Chip timer suffers cpu dvfs jitter can wakeup from cc7 > T20 us-timer No Yes > T20 twd timer Yes No? > T30 us-timer No Yes > T30 twd timer Yes No? > T114 us-timer No Yes > T114 arch timer No Yes > T124 us-timer No Yes > T124 arch timer No Yes > T210 us-timer No Yes > T210 arch timer No No > T210 clk_m timer No Yes > > right? Doesn't arch timer run off the CPU clock? If yes (that's what I assumed), then it should be affected by the DVFS. Otherwise I'll lower the clocksource's rating for T114/124/132. TWD can't wake CPU from the power-down state, so it's a solid "No" for TWD in the "can wakeup from cc7" column.
On 31/05/2019 14:33, Dmitry Osipenko wrote: > 31.05.2019 11:26, Peter De Schrijver пишет: >> On Fri, May 24, 2019 at 06:32:45PM +0300, Dmitry Osipenko wrote: >>> Hello, >>> >>> This series primarily unifies the driver code across all Tegra SoC >>> generations. In a result the clocksources are allocated per-CPU on >>> older Tegra's and have a higher rating than the arch-timer, the newer >>> Tegra210 is getting support for microsecond clocksource and the driver's >>> code is getting much cleaner. Note that arch-timer usage is discouraged on >>> all Tegra's due to the time jitter caused by the CPU frequency scaling. >> >> I think the limitations are more as follows: >> >> Chip timer suffers cpu dvfs jitter can wakeup from cc7 >> T20 us-timer No Yes >> T20 twd timer Yes No? >> T30 us-timer No Yes >> T30 twd timer Yes No? >> T114 us-timer No Yes >> T114 arch timer No Yes >> T124 us-timer No Yes >> T124 arch timer No Yes >> T210 us-timer No Yes >> T210 arch timer No No >> T210 clk_m timer No Yes >> >> right? > > Doesn't arch timer run off the CPU clock? If yes (that's what I > assumed), then it should be affected by the DVFS. Otherwise I'll lower > the clocksource's rating for T114/124/132. > > TWD can't wake CPU from the power-down state, so it's a solid "No" for > TWD in the "can wakeup from cc7" column. Wouldn't make sense to rename the timer-tegra20.c to timer-tegra.c now ?
31.05.2019 23:31, Daniel Lezcano пишет: > On 31/05/2019 14:33, Dmitry Osipenko wrote: >> 31.05.2019 11:26, Peter De Schrijver пишет: >>> On Fri, May 24, 2019 at 06:32:45PM +0300, Dmitry Osipenko wrote: >>>> Hello, >>>> >>>> This series primarily unifies the driver code across all Tegra SoC >>>> generations. In a result the clocksources are allocated per-CPU on >>>> older Tegra's and have a higher rating than the arch-timer, the newer >>>> Tegra210 is getting support for microsecond clocksource and the driver's >>>> code is getting much cleaner. Note that arch-timer usage is discouraged on >>>> all Tegra's due to the time jitter caused by the CPU frequency scaling. >>> >>> I think the limitations are more as follows: >>> >>> Chip timer suffers cpu dvfs jitter can wakeup from cc7 >>> T20 us-timer No Yes >>> T20 twd timer Yes No? >>> T30 us-timer No Yes >>> T30 twd timer Yes No? >>> T114 us-timer No Yes >>> T114 arch timer No Yes >>> T124 us-timer No Yes >>> T124 arch timer No Yes >>> T210 us-timer No Yes >>> T210 arch timer No No >>> T210 clk_m timer No Yes >>> >>> right? >> >> Doesn't arch timer run off the CPU clock? If yes (that's what I >> assumed), then it should be affected by the DVFS. Otherwise I'll lower >> the clocksource's rating for T114/124/132. >> >> TWD can't wake CPU from the power-down state, so it's a solid "No" for >> TWD in the "can wakeup from cc7" column. > > Wouldn't make sense to rename the timer-tegra20.c to timer-tegra.c now ? Wouldn't hurt, given the refreshment that driver is getting lately. I'll include a patch for that in the next revision, thanks.
On Fri, May 31, 2019 at 03:33:41PM +0300, Dmitry Osipenko wrote: > 31.05.2019 11:26, Peter De Schrijver пишет: > > On Fri, May 24, 2019 at 06:32:45PM +0300, Dmitry Osipenko wrote: > >> Hello, > >> > >> This series primarily unifies the driver code across all Tegra SoC > >> generations. In a result the clocksources are allocated per-CPU on > >> older Tegra's and have a higher rating than the arch-timer, the newer > >> Tegra210 is getting support for microsecond clocksource and the driver's > >> code is getting much cleaner. Note that arch-timer usage is discouraged on > >> all Tegra's due to the time jitter caused by the CPU frequency scaling. > > > > I think the limitations are more as follows: > > > > Chip timer suffers cpu dvfs jitter can wakeup from cc7 > > T20 us-timer No Yes > > T20 twd timer Yes No? > > T30 us-timer No Yes > > T30 twd timer Yes No? > > T114 us-timer No Yes > > T114 arch timer No Yes > > T124 us-timer No Yes > > T124 arch timer No Yes > > T210 us-timer No Yes > > T210 arch timer No No > > T210 clk_m timer No Yes > > > > right? > > Doesn't arch timer run off the CPU clock? If yes (that's what I > assumed), then it should be affected by the DVFS. Otherwise I'll lower > the clocksource's rating for T114/124/132. > No. It doesn't. This is the big change between A9 and later CPUs. Peter. > TWD can't wake CPU from the power-down state, so it's a solid "No" for > TWD in the "can wakeup from cc7" column.
03.06.2019 10:17, Peter De Schrijver пишет: > On Fri, May 31, 2019 at 03:33:41PM +0300, Dmitry Osipenko wrote: >> 31.05.2019 11:26, Peter De Schrijver пишет: >>> On Fri, May 24, 2019 at 06:32:45PM +0300, Dmitry Osipenko wrote: >>>> Hello, >>>> >>>> This series primarily unifies the driver code across all Tegra SoC >>>> generations. In a result the clocksources are allocated per-CPU on >>>> older Tegra's and have a higher rating than the arch-timer, the newer >>>> Tegra210 is getting support for microsecond clocksource and the driver's >>>> code is getting much cleaner. Note that arch-timer usage is discouraged on >>>> all Tegra's due to the time jitter caused by the CPU frequency scaling. >>> >>> I think the limitations are more as follows: >>> >>> Chip timer suffers cpu dvfs jitter can wakeup from cc7 >>> T20 us-timer No Yes >>> T20 twd timer Yes No? >>> T30 us-timer No Yes >>> T30 twd timer Yes No? >>> T114 us-timer No Yes >>> T114 arch timer No Yes >>> T124 us-timer No Yes >>> T124 arch timer No Yes >>> T210 us-timer No Yes >>> T210 arch timer No No >>> T210 clk_m timer No Yes >>> >>> right? >> >> Doesn't arch timer run off the CPU clock? If yes (that's what I >> assumed), then it should be affected by the DVFS. Otherwise I'll lower >> the clocksource's rating for T114/124/132. >> > > No. It doesn't. This is the big change between A9 and later CPUs. Thank you for the clarification, I'll add a patch to lower the rating where appropriate.