| Message ID | 1558548188-1155-1-git-send-email-yibin.gong@nxp.com |
|---|---|
| Headers | show |
| Series | add ecspi ERR009165 for i.mx6/7 soc family | expand |
Hi Robin, Am Mittwoch, den 22.05.2019, 09:59 +0000 schrieb Robin Gong: > There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO > transfer to be send twice in DMA mode. Please get more information from: > https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding > new sdma ram script which works in XCH mode as PIO inside sdma instead > of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be > exist on all legacy i.mx6/7 soc family before i.mx6ul. > NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/ > 6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips > still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi' > for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata > or not. > The first two reverted patches should be the same issue, though, it > seems 'fixed' by changing to other shp script. Hope Sean or Sascha could > have the chance to test this patch set if could fix their issues. > Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work > on i.mx8mm because the event id is zero. > > PS: > Please get sdma firmware from below linux-firmware and copy it to your > local rootfs /lib/firmware/imx/sdma. > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma I haven't tested this so asking the obvious question: what happens when this series is applied without the RAM script being present on the system? Will it render SPI unusable? I guess so since it changes the flow between the SPI core and DMA controller. Can we somehow detect that SDMA isn't using the correct RAM script and fall back to PIO mode in the SPI driver in that case? Currently using the RAM script is not an option in a lot of use-cases, as it still breaks serial DMA support. The fix for the serial issue really needs to be remove the broken serial script from the RAM firmware, not change the serial driver to deal with the broken behavior introduced by the RAM script. Regards, Lucas
On 22-05-19, 10:00, Robin Gong wrote: > Because the number of ecspi1 rx event on i.mx8mm is 0, the condition > check ignore such special case without dma channel enabled, which caused > ecspi1 rx works failed. Actually, no need to check event_id0/event_id1 > and replace checking 'event_id1' with 'DMA_DEV_TO_DEV', so that configure > event_id1 only in case DEV_TO_DEV. Acked-by: Vinod Koul <vkoul@kernel.org>
There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO transfer to be send twice in DMA mode. Please get more information from: https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding new sdma ram script which works in XCH mode as PIO inside sdma instead of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be exist on all legacy i.mx6/7 soc family before i.mx6ul. NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/ 6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi' for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata or not. The first two reverted patches should be the same issue, though, it seems 'fixed' by changing to other shp script. Hope Sean or Sascha could have the chance to test this patch set if could fix their issues. Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work on i.mx8mm because the event id is zero. PS: Please get sdma firmware from below linux-firmware and copy it to your local rootfs /lib/firmware/imx/sdma. https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma v2: 1. add commit log for reverted patches. 2. add comment for 'ecspi_fixed' in sdma driver. 3. add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi' rather than remove. v3: 1. confirm with design team make sure ERR009165 fixed on i.mx6ul/i.mx6ull /i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy chips. Correct dts related dts patch in v2. 2. clean eratta information in binding doc and new 'tx_glitch_fixed' flag in spi-imx driver to state ERR009165 fixed or not. 3. Enlarge burst size to fifo size for tx since tx_wml set to 0 in the errata workaroud, thus improve performance as possible. v4: 1. add Ack tag from Mark and Vinod 2. remove checking 'event_id1' zero as 'event_id0'. Robin Gong (14): Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core" Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores" Revert "dmaengine: imx-sdma: refine to load context only once" dmaengine: imx-sdma: remove dupilicated sdma_load_context dmaengine: imx-sdma: add mcu_2_ecspi script spi: imx: fix ERR009165 spi: imx: remove ERR009165 workaround on i.mx6ul dt-bindings: spi: imx: add new i.mx6ul compatible name dmaengine: imx-sdma: remove ERR009165 on i.mx6ul dt-bindings: dma: imx-sdma: add i.mx6ul/6sx compatible name dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm ARM: dts: imx6ul: add dma support on ecspi ARM: dts: imx6sll: correct sdma compatible arm64: defconfig: Enable SDMA on i.mx8mq/8mm .../devicetree/bindings/dma/fsl-imx-sdma.txt | 2 + .../devicetree/bindings/spi/fsl-imx-cspi.txt | 1 + arch/arm/boot/dts/imx6q.dtsi | 2 +- arch/arm/boot/dts/imx6qdl.dtsi | 8 +-- arch/arm/boot/dts/imx6sll.dtsi | 2 +- arch/arm/boot/dts/imx6ul.dtsi | 8 +++ arch/arm64/configs/defconfig | 3 + drivers/dma/imx-sdma.c | 78 ++++++++++++++++------ drivers/spi/spi-imx.c | 61 ++++++++++++++--- include/linux/platform_data/dma-imx-sdma.h | 1 + 10 files changed, 132 insertions(+), 34 deletions(-)