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[v3,0/7] add support for SAM9X60 pin controller

Message ID 1549531468-1676-1-git-send-email-claudiu.beznea@microchip.com
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Series add support for SAM9X60 pin controller | expand

Message

Claudiu Beznea Feb. 7, 2019, 9:24 a.m. UTC 
From: Claudiu Beznea <claudiu.beznea@microchip.com>

This series adds drive strenght and slew rate support for SAMX60's pin
controller. For drive strenght we could have 2 values: low, high.
For slew rate we could have 2 values: enable, disabled.

Besides this I took the chance and adapt the documentation for at91 pinctrl
driver.

Changes in v3:
- fix checkpatch.pl warning on DBG_SHOW_FLAG_MASKED() macro in patch 1/7
- add Ack-by tag

Changes in v2:
- s/microchip,sam9x60-pictrl/microchip,sam9x60-pinctrl in patches 3/7, 5/7

Claudiu Beznea (7):
  pinctrl: at91: add option to use drive strength bits
  pinctrl: at91: add drive strength support for SAM9X60
  pinctrl: at91: add compatibles for SAM9X60 pin controller
  dt-bindings: add documentation for banks
  dt-bindings: add bindings for SAM9X60
  pinctrl: at91: add slewrate support for SAM9X60
  dt-bindings: add documentation for slew rate

 .../bindings/pinctrl/atmel,at91-pinctrl.txt        |  27 ++++-
 drivers/pinctrl/pinctrl-at91.c                     | 134 +++++++++++++++++++--
 drivers/pinctrl/pinctrl-at91.h                     |   3 +
 include/dt-bindings/pinctrl/at91.h                 |   4 +
 4 files changed, 155 insertions(+), 13 deletions(-)

Comments

Linus Walleij Feb. 8, 2019, 12:07 p.m. UTC | #1 
On Thu, Feb 7, 2019 at 10:24 AM <Claudiu.Beznea@microchip.com> wrote:

> From: Claudiu Beznea <claudiu.beznea@microchip.com>
>
> This series adds drive strenght and slew rate support for SAMX60's pin
> controller. For drive strenght we could have 2 values: low, high.
> For slew rate we could have 2 values: enable, disabled.
>
> Besides this I took the chance and adapt the documentation for at91 pinctrl
> driver.
>
> Changes in v3:
> - fix checkpatch.pl warning on DBG_SHOW_FLAG_MASKED() macro in patch 1/7
> - add Ack-by tag

All 7 patches applied for kernel v5.1.

Yours,
Linus Walleij