mbox series

[v2,0/3] spi-nor block protection

Message ID 20190129220705.5143-1-jonas@norrbonn.se
Headers show
Series spi-nor block protection | expand

Message

Jonas Bonn Jan. 29, 2019, 10:07 p.m. UTC 
Changed in v2:
* Provide the below cover letter
* Rebase patches so they apply cleanly on linux-next


In order to make device that's effectively read-only except to an
authorized user we need:

i)  Some way of defaulting block-protection to on when device is first
powered
ii)  Some way of controlling the write-protect signal so that the BP
(block protect) bits can't be changed

Some SPI flashes support the BPNV configuration register bit:  block
protect non-volatile.  When this bit is set, the block protection bits
BP0, BP1, and BP2 default to 1, effectively causing the flash memory to
becomes read-only at power on.  If we can set this bit, we solve problem
i) above.

Controlling the write-protect input is a matter for something external
to the flash itself.  Unfortunately, the WP# signal is only honoured if
the status register bit SRWD (status register write disable) is set.  If
we can have this bit always set, then we solve problem ii) above.

This short patch series provides the above bits, allowing for the
creation of a device that's effectively read-only to any actor who isn't
able to control the WP# signal.

Jonas Bonn (3):
  mtd: spi-nor: always respect write-protect input
  mtd: spi-nor: s25fl512s supports region locking
  mtd: spi-nor: allow setting the BPNV (default locked) bit

 drivers/mtd/mtdchar.c         |   6 ++
 drivers/mtd/mtdcore.c         |   8 +++
 drivers/mtd/spi-nor/spi-nor.c | 119 ++++++++++++++++++++++------------
 include/linux/mtd/mtd.h       |   2 +
 include/linux/mtd/spi-nor.h   |   1 +
 include/uapi/mtd/mtd-abi.h    |   1 +
 6 files changed, 97 insertions(+), 40 deletions(-)

Comments

Jonas Bonn Feb. 14, 2019, 9:21 a.m. UTC | #1 
Hi,

Just a gentle reminder that I'd like some feedback on these patches.

Thanks,
Jonas

On 29/01/2019 23:07, Jonas Bonn wrote:
> Changed in v2:
> * Provide the below cover letter
> * Rebase patches so they apply cleanly on linux-next
> 
> 
> In order to make device that's effectively read-only except to an
> authorized user we need:
> 
> i)  Some way of defaulting block-protection to on when device is first
> powered
> ii)  Some way of controlling the write-protect signal so that the BP
> (block protect) bits can't be changed
> 
> Some SPI flashes support the BPNV configuration register bit:  block
> protect non-volatile.  When this bit is set, the block protection bits
> BP0, BP1, and BP2 default to 1, effectively causing the flash memory to
> becomes read-only at power on.  If we can set this bit, we solve problem
> i) above.
> 
> Controlling the write-protect input is a matter for something external
> to the flash itself.  Unfortunately, the WP# signal is only honoured if
> the status register bit SRWD (status register write disable) is set.  If
> we can have this bit always set, then we solve problem ii) above.
> 
> This short patch series provides the above bits, allowing for the
> creation of a device that's effectively read-only to any actor who isn't
> able to control the WP# signal.
> 
> Jonas Bonn (3):
>    mtd: spi-nor: always respect write-protect input
>    mtd: spi-nor: s25fl512s supports region locking
>    mtd: spi-nor: allow setting the BPNV (default locked) bit
> 
>   drivers/mtd/mtdchar.c         |   6 ++
>   drivers/mtd/mtdcore.c         |   8 +++
>   drivers/mtd/spi-nor/spi-nor.c | 119 ++++++++++++++++++++++------------
>   include/linux/mtd/mtd.h       |   2 +
>   include/linux/mtd/spi-nor.h   |   1 +
>   include/uapi/mtd/mtd-abi.h    |   1 +
>   6 files changed, 97 insertions(+), 40 deletions(-)
>
Tudor Ambarus Feb. 14, 2019, 9:33 a.m. UTC | #2 
On 02/14/2019 11:21 AM, Jonas Bonn wrote:
> Hi,

Hi,

> 
> Just a gentle reminder that I'd like some feedback on these patches.

yep, I'm going to review them these days, I still have few in my queue.

Cheers,
ta