[PATCHv3,00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs
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Message ID 20190129080926.36773-1-Zhiqiang.Hou@nxp.com
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  • PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs
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Z.q. Hou Jan. 29, 2019, 8:08 a.m. UTC
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

This patch set is aim to refactor the Mobiveil driver and add
PCIe support for NXP Layerscape series SoCs integrated Mobiveil's
PCIe Gen4 controller.

Hou Zhiqiang (27):
  PCI: mobiveil: uniform the register accessors
  PCI: mobiveil: format the code without function change
  PCI: mobiveil: correct the returned error number
  PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI
  PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
  PCI: mobiveil: replace the resource list iteration function
  PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window
  PCI: mobiveil: use the 1st inbound window for MEM inbound transactions
  PCI: mobiveil: correct inbound/outbound window setup routines
  PCI: mobiveil: fix the INTx process error
  PCI: mobiveil: only fix up the Class Code field
  PCI: mobiveil: move out the link up waiting from mobiveil_host_init
  PCI: mobiveil: move irq chained handler setup out of DT parse
  PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number
  dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional
  PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver
  PCI: mobiveil: fix the checking of valid device
  PCI: mobiveil: continue to initialize the host upon no PCIe link
  PCI: mobiveil: disabled IB and OB windows set by bootloader
  PCI: mobiveil: add Byte and Half-Word width register accessors
  PCI: mobiveil: make mobiveil_host_init can be used to re-init host
  dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller
  PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs
  PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
  PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451
  arm64: dts: freescale: lx2160a: add pcie DT nodes
  arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4

 .../bindings/pci/layerscape-pci-gen4.txt      |  52 ++
 .../devicetree/bindings/pci/mobiveil-pcie.txt |   2 +
 MAINTAINERS                                   |  10 +-
 .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++
 arch/arm64/configs/defconfig                  |   1 +
 drivers/pci/controller/Kconfig                |  11 +-
 drivers/pci/controller/Makefile               |   2 +-
 drivers/pci/controller/mobiveil/Kconfig       |  34 +
 drivers/pci/controller/mobiveil/Makefile      |   5 +
 .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++
 .../controller/mobiveil/pcie-mobiveil-host.c  | 640 +++++++++++++
 .../controller/mobiveil/pcie-mobiveil-plat.c  |  54 ++
 .../pci/controller/mobiveil/pcie-mobiveil.c   | 246 +++++
 .../pci/controller/mobiveil/pcie-mobiveil.h   | 229 +++++
 drivers/pci/controller/pcie-mobiveil.c        | 861 ------------------
 15 files changed, 1743 insertions(+), 873 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt
 create mode 100644 drivers/pci/controller/mobiveil/Kconfig
 create mode 100644 drivers/pci/controller/mobiveil/Makefile
 create mode 100644 drivers/pci/controller/mobiveil/pci-layerscape-gen4.c
 create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
 create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c
 create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c
 create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h
 delete mode 100644 drivers/pci/controller/pcie-mobiveil.c

Comments

Lorenzo Pieralisi Jan. 29, 2019, 11:39 a.m. UTC | #1
On Tue, Jan 29, 2019 at 08:08:28AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> This patch set is aim to refactor the Mobiveil driver and add
> PCIe support for NXP Layerscape series SoCs integrated Mobiveil's
> PCIe Gen4 controller.
> 
> Hou Zhiqiang (27):
>   PCI: mobiveil: uniform the register accessors
>   PCI: mobiveil: format the code without function change
>   PCI: mobiveil: correct the returned error number
>   PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI
>   PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
>   PCI: mobiveil: replace the resource list iteration function
>   PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window
>   PCI: mobiveil: use the 1st inbound window for MEM inbound transactions
>   PCI: mobiveil: correct inbound/outbound window setup routines
>   PCI: mobiveil: fix the INTx process error
>   PCI: mobiveil: only fix up the Class Code field
>   PCI: mobiveil: move out the link up waiting from mobiveil_host_init
>   PCI: mobiveil: move irq chained handler setup out of DT parse
>   PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number
>   dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional
>   PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver
>   PCI: mobiveil: fix the checking of valid device
>   PCI: mobiveil: continue to initialize the host upon no PCIe link
>   PCI: mobiveil: disabled IB and OB windows set by bootloader
>   PCI: mobiveil: add Byte and Half-Word width register accessors
>   PCI: mobiveil: make mobiveil_host_init can be used to re-init host
>   dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller
>   PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs
>   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
>   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451
>   arm64: dts: freescale: lx2160a: add pcie DT nodes
>   arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4

Subrahmanya,

Either you review this series or I will have to drop you from
the MAINTAINERS list for this driver, I am sorry but I asked you
before to no avail.

Thanks,
Lorenzo

>  .../bindings/pci/layerscape-pci-gen4.txt      |  52 ++
>  .../devicetree/bindings/pci/mobiveil-pcie.txt |   2 +
>  MAINTAINERS                                   |  10 +-
>  .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++
>  arch/arm64/configs/defconfig                  |   1 +
>  drivers/pci/controller/Kconfig                |  11 +-
>  drivers/pci/controller/Makefile               |   2 +-
>  drivers/pci/controller/mobiveil/Kconfig       |  34 +
>  drivers/pci/controller/mobiveil/Makefile      |   5 +
>  .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++
>  .../controller/mobiveil/pcie-mobiveil-host.c  | 640 +++++++++++++
>  .../controller/mobiveil/pcie-mobiveil-plat.c  |  54 ++
>  .../pci/controller/mobiveil/pcie-mobiveil.c   | 246 +++++
>  .../pci/controller/mobiveil/pcie-mobiveil.h   | 229 +++++
>  drivers/pci/controller/pcie-mobiveil.c        | 861 ------------------
>  15 files changed, 1743 insertions(+), 873 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt
>  create mode 100644 drivers/pci/controller/mobiveil/Kconfig
>  create mode 100644 drivers/pci/controller/mobiveil/Makefile
>  create mode 100644 drivers/pci/controller/mobiveil/pci-layerscape-gen4.c
>  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
>  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c
>  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c
>  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h
>  delete mode 100644 drivers/pci/controller/pcie-mobiveil.c
> 
> -- 
> 2.17.1
>
Bjorn Helgaas Jan. 30, 2019, 3:34 p.m. UTC | #2
On Tue, Jan 29, 2019 at 08:08:28AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> This patch set is aim to refactor the Mobiveil driver and add
> PCIe support for NXP Layerscape series SoCs integrated Mobiveil's
> PCIe Gen4 controller.
> 
> Hou Zhiqiang (27):
>   PCI: mobiveil: uniform the register accessors
>   PCI: mobiveil: format the code without function change
>   PCI: mobiveil: correct the returned error number
>   PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI
>   PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
>   PCI: mobiveil: replace the resource list iteration function
>   PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window
>   PCI: mobiveil: use the 1st inbound window for MEM inbound transactions
>   PCI: mobiveil: correct inbound/outbound window setup routines
>   PCI: mobiveil: fix the INTx process error
>   PCI: mobiveil: only fix up the Class Code field
>   PCI: mobiveil: move out the link up waiting from mobiveil_host_init
>   PCI: mobiveil: move irq chained handler setup out of DT parse
>   PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number
>   dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional
>   PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver
>   PCI: mobiveil: fix the checking of valid device
>   PCI: mobiveil: continue to initialize the host upon no PCIe link
>   PCI: mobiveil: disabled IB and OB windows set by bootloader
>   PCI: mobiveil: add Byte and Half-Word width register accessors
>   PCI: mobiveil: make mobiveil_host_init can be used to re-init host
>   dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller
>   PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs
>   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
>   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451
>   arm64: dts: freescale: lx2160a: add pcie DT nodes
>   arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4

If/when you repost this, please pay attention to the changelog
conventions, e.g., capitalize the first word of the sentence ("Remove
flag ...", "Correct PCI base address ...", etc), capitalize acronyms
like "PCI" and "IRQ", use parentheses after function names, etc.  You
can see the conventions by running "git log --oneline
drivers/pci/controller".
Lorenzo Pieralisi Feb. 4, 2019, 4:13 p.m. UTC | #3
On Mon, Feb 04, 2019 at 07:44:25PM +0530, Subrahmanya Lingappa wrote:
>    Bjorn,
>    My apologies, I was away for a while from this work.
>    I am starting to review now.

Hi,

I am not Bjorn and as I told you before you should not reply
with html context (ie use plain text, the public lists will
reject your emails otherwise) and top-post.

You are supposed to maintain this code, if you can't it is fine but I
should know because there are developers who are waiting for your
review, please understand.

Thanks,
Lorenzo

>    Thanks,
>    ~subbu
>    On Tue, Jan 29, 2019 at 5:09 PM Lorenzo Pieralisi
>    <lorenzo.pieralisi@arm.com> wrote:
> 
>      On Tue, Jan 29, 2019 at 08:08:28AM +0000, Z.q. Hou wrote:
>      > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
>      >
>      > This patch set is aim to refactor the Mobiveil driver and add
>      > PCIe support for NXP Layerscape series SoCs integrated Mobiveil's
>      > PCIe Gen4 controller.
>      >
>      > Hou Zhiqiang (27):
>      >   PCI: mobiveil: uniform the register accessors
>      >   PCI: mobiveil: format the code without function change
>      >   PCI: mobiveil: correct the returned error number
>      >   PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI
>      >   PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
>      >   PCI: mobiveil: replace the resource list iteration function
>      >   PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window
>      >   PCI: mobiveil: use the 1st inbound window for MEM inbound
>      transactions
>      >   PCI: mobiveil: correct inbound/outbound window setup routines
>      >   PCI: mobiveil: fix the INTx process error
>      >   PCI: mobiveil: only fix up the Class Code field
>      >   PCI: mobiveil: move out the link up waiting from mobiveil_host_init
>      >   PCI: mobiveil: move irq chained handler setup out of DT parse
>      >   PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number
>      >   dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to
>      optional
>      >   PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver
>      >   PCI: mobiveil: fix the checking of valid device
>      >   PCI: mobiveil: continue to initialize the host upon no PCIe link
>      >   PCI: mobiveil: disabled IB and OB windows set by bootloader
>      >   PCI: mobiveil: add Byte and Half-Word width register accessors
>      >   PCI: mobiveil: make mobiveil_host_init can be used to re-init host
>      >   dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller
>      >   PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs
>      >   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
>      >   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451
>      >   arm64: dts: freescale: lx2160a: add pcie DT nodes
>      >   arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4
> 
>      Subrahmanya,
> 
>      Either you review this series or I will have to drop you from
>      the MAINTAINERS list for this driver, I am sorry but I asked you
>      before to no avail.
> 
>      Thanks,
>      Lorenzo
> 
>      >  .../bindings/pci/layerscape-pci-gen4.txt      |  52 ++
>      >  .../devicetree/bindings/pci/mobiveil-pcie.txt |   2 +
>      >  MAINTAINERS                                   |  10 +-
>      >  .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++
>      >  arch/arm64/configs/defconfig                  |   1 +
>      >  drivers/pci/controller/Kconfig                |  11 +-
>      >  drivers/pci/controller/Makefile               |   2 +-
>      >  drivers/pci/controller/mobiveil/Kconfig       |  34 +
>      >  drivers/pci/controller/mobiveil/Makefile      |   5 +
>      >  .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++
>      >  .../controller/mobiveil/pcie-mobiveil-host.c  | 640 +++++++++++++
>      >  .../controller/mobiveil/pcie-mobiveil-plat.c  |  54 ++
>      >  .../pci/controller/mobiveil/pcie-mobiveil.c   | 246 +++++
>      >  .../pci/controller/mobiveil/pcie-mobiveil.h   | 229 +++++
>      >  drivers/pci/controller/pcie-mobiveil.c        | 861
>      ------------------
>      >  15 files changed, 1743 insertions(+), 873 deletions(-)
>      >  create mode 100644
>      Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt
>      >  create mode 100644 drivers/pci/controller/mobiveil/Kconfig
>      >  create mode 100644 drivers/pci/controller/mobiveil/Makefile
>      >  create mode 100644
>      drivers/pci/controller/mobiveil/pci-layerscape-gen4.c
>      >  create mode 100644
>      drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
>      >  create mode 100644
>      drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c
>      >  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c
>      >  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h
>      >  delete mode 100644 drivers/pci/controller/pcie-mobiveil.c
>      >
>      > --
>      > 2.17.1
>      >
Subrahmanya Lingappa Feb. 4, 2019, 4:51 p.m. UTC | #4
Lorenzo,
My apologies again,

I have started looking into these.

Thanks,




On Mon, Feb 4, 2019 at 9:43 PM Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
>
> On Mon, Feb 04, 2019 at 07:44:25PM +0530, Subrahmanya Lingappa wrote:
> >    Bjorn,
> >    My apologies, I was away for a while from this work.
> >    I am starting to review now.
>
> Hi,
>
> I am not Bjorn and as I told you before you should not reply
> with html context (ie use plain text, the public lists will
> reject your emails otherwise) and top-post.
>
> You are supposed to maintain this code, if you can't it is fine but I
> should know because there are developers who are waiting for your
> review, please understand.
>
> Thanks,
> Lorenzo
>
> >    Thanks,
> >    ~subbu
> >    On Tue, Jan 29, 2019 at 5:09 PM Lorenzo Pieralisi
> >    <lorenzo.pieralisi@arm.com> wrote:
> >
> >      On Tue, Jan 29, 2019 at 08:08:28AM +0000, Z.q. Hou wrote:
> >      > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >      >
> >      > This patch set is aim to refactor the Mobiveil driver and add
> >      > PCIe support for NXP Layerscape series SoCs integrated Mobiveil's
> >      > PCIe Gen4 controller.
> >      >
> >      > Hou Zhiqiang (27):
> >      >   PCI: mobiveil: uniform the register accessors
> >      >   PCI: mobiveil: format the code without function change
> >      >   PCI: mobiveil: correct the returned error number
> >      >   PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI
> >      >   PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
> >      >   PCI: mobiveil: replace the resource list iteration function
> >      >   PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window
> >      >   PCI: mobiveil: use the 1st inbound window for MEM inbound
> >      transactions
> >      >   PCI: mobiveil: correct inbound/outbound window setup routines
> >      >   PCI: mobiveil: fix the INTx process error
> >      >   PCI: mobiveil: only fix up the Class Code field
> >      >   PCI: mobiveil: move out the link up waiting from mobiveil_host_init
> >      >   PCI: mobiveil: move irq chained handler setup out of DT parse
> >      >   PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number
> >      >   dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to
> >      optional
> >      >   PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver
> >      >   PCI: mobiveil: fix the checking of valid device
> >      >   PCI: mobiveil: continue to initialize the host upon no PCIe link
> >      >   PCI: mobiveil: disabled IB and OB windows set by bootloader
> >      >   PCI: mobiveil: add Byte and Half-Word width register accessors
> >      >   PCI: mobiveil: make mobiveil_host_init can be used to re-init host
> >      >   dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller
> >      >   PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs
> >      >   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
> >      >   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451
> >      >   arm64: dts: freescale: lx2160a: add pcie DT nodes
> >      >   arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4
> >
> >      Subrahmanya,
> >
> >      Either you review this series or I will have to drop you from
> >      the MAINTAINERS list for this driver, I am sorry but I asked you
> >      before to no avail.
> >
> >      Thanks,
> >      Lorenzo
> >
> >      >  .../bindings/pci/layerscape-pci-gen4.txt      |  52 ++
> >      >  .../devicetree/bindings/pci/mobiveil-pcie.txt |   2 +
> >      >  MAINTAINERS                                   |  10 +-
> >      >  .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++
> >      >  arch/arm64/configs/defconfig                  |   1 +
> >      >  drivers/pci/controller/Kconfig                |  11 +-
> >      >  drivers/pci/controller/Makefile               |   2 +-
> >      >  drivers/pci/controller/mobiveil/Kconfig       |  34 +
> >      >  drivers/pci/controller/mobiveil/Makefile      |   5 +
> >      >  .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++
> >      >  .../controller/mobiveil/pcie-mobiveil-host.c  | 640 +++++++++++++
> >      >  .../controller/mobiveil/pcie-mobiveil-plat.c  |  54 ++
> >      >  .../pci/controller/mobiveil/pcie-mobiveil.c   | 246 +++++
> >      >  .../pci/controller/mobiveil/pcie-mobiveil.h   | 229 +++++
> >      >  drivers/pci/controller/pcie-mobiveil.c        | 861
> >      ------------------
> >      >  15 files changed, 1743 insertions(+), 873 deletions(-)
> >      >  create mode 100644
> >      Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt
> >      >  create mode 100644 drivers/pci/controller/mobiveil/Kconfig
> >      >  create mode 100644 drivers/pci/controller/mobiveil/Makefile
> >      >  create mode 100644
> >      drivers/pci/controller/mobiveil/pci-layerscape-gen4.c
> >      >  create mode 100644
> >      drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
> >      >  create mode 100644
> >      drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c
> >      >  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c
> >      >  create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h
> >      >  delete mode 100644 drivers/pci/controller/pcie-mobiveil.c
> >      >
> >      > --
> >      > 2.17.1
> >      >