| Message ID | 20190111074627.26560-1-acelan.kao@canonical.com |
|---|---|
| Headers | show |
| Series | ELAN900C:00 04F3:2844 touchscreen doesn't work | expand |
On 11.01.19 08:46, AceLan Kao wrote: > BugLink: https://bugs.launchpad.net/bugs/1811335 > > [Impact] > [ELAN900C:00 04F3:2844] doesn't work > > [Fix] > It works under kernel v4.19, so after bisect the kernel and got the first bad commit > e50d95e2ad12 pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant > > [Test] > Verified on the DELL machine, the touchscreen works well. > > [Regression Potential] > Low, the 2 commits are all > Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support") > Should be safe to be included. > > Andy Shevchenko (1): > pinctrl: cannonlake: Fix community ordering for H variant > > Mika Westerberg (1): > pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant > > drivers/pinctrl/intel/pinctrl-cannonlake.c | 37 ++++++++++++---------- > 1 file changed, 20 insertions(+), 17 deletions(-) > Acked-by: Stefan Bader <stefan.bader@canonical.com>
On 11/01/2019 07:46, AceLan Kao wrote: > BugLink: https://bugs.launchpad.net/bugs/1811335 > > [Impact] > [ELAN900C:00 04F3:2844] doesn't work > > [Fix] > It works under kernel v4.19, so after bisect the kernel and got the first bad commit > e50d95e2ad12 pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant > > [Test] > Verified on the DELL machine, the touchscreen works well. > > [Regression Potential] > Low, the 2 commits are all > Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support") > Should be safe to be included. > > Andy Shevchenko (1): > pinctrl: cannonlake: Fix community ordering for H variant > > Mika Westerberg (1): > pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant > > drivers/pinctrl/intel/pinctrl-cannonlake.c | 37 ++++++++++++---------- > 1 file changed, 20 insertions(+), 17 deletions(-) > Clean cherry picks, fixes known issue. Thanks. Acked-by: Colin Ian King <colin.king@canonical.com>
On 1/11/19 8:46 AM, AceLan Kao wrote: > BugLink: https://bugs.launchpad.net/bugs/1811335 > > [Impact] > [ELAN900C:00 04F3:2844] doesn't work > > [Fix] > It works under kernel v4.19, so after bisect the kernel and got the first bad commit > e50d95e2ad12 pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant > > [Test] > Verified on the DELL machine, the touchscreen works well. > > [Regression Potential] > Low, the 2 commits are all > Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support") > Should be safe to be included. > > Andy Shevchenko (1): > pinctrl: cannonlake: Fix community ordering for H variant > > Mika Westerberg (1): > pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant > > drivers/pinctrl/intel/pinctrl-cannonlake.c | 37 ++++++++++++---------- > 1 file changed, 20 insertions(+), 17 deletions(-) > Applied to bionic/master-next and cosmic/master-next branches. Thanks, Kleber
BugLink: https://bugs.launchpad.net/bugs/1811335 [Impact] [ELAN900C:00 04F3:2844] doesn't work [Fix] It works under kernel v4.19, so after bisect the kernel and got the first bad commit e50d95e2ad12 pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant [Test] Verified on the DELL machine, the touchscreen works well. [Regression Potential] Low, the 2 commits are all Fixes: a663ccf0fea1 ("pinctrl: intel: Add Intel Cannon Lake PCH-H pin controller support") Should be safe to be included. Andy Shevchenko (1): pinctrl: cannonlake: Fix community ordering for H variant Mika Westerberg (1): pinctrl: cannonlake: Fix HOSTSW_OWN register offset of H variant drivers/pinctrl/intel/pinctrl-cannonlake.c | 37 ++++++++++++---------- 1 file changed, 20 insertions(+), 17 deletions(-)