| Message ID | 1423659316-2040-1-git-send-email-luca.ellero@brickedbrain.com |
|---|---|
| State | Superseded |
| Delegated to: | Stefano Babic |
| Headers | show |
On Wednesday, February 11, 2015 at 01:55:16 PM, Luca Ellero wrote: > As stated in the iMX6 Reference Manual (Ch. 14.2), the CMDPIOWORDS field > should reflect the number of pio_words sent in the actual DMA transfer. > In all these transfers there is only one pio_word, so data field must be 1. > > Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com> This was tested on MX6 only, right ? Reviewed-by: Marek Vasut <marex@denx.de> Best regards, Marek Vasut
On 11/02/2015 21:37, Marek Vasut wrote: > On Wednesday, February 11, 2015 at 01:55:16 PM, Luca Ellero wrote: >> As stated in the iMX6 Reference Manual (Ch. 14.2), the CMDPIOWORDS field >> should reflect the number of pio_words sent in the actual DMA transfer. >> In all these transfers there is only one pio_word, so data field must be 1. >> >> Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com> > > This was tested on MX6 only, right ? > > Reviewed-by: Marek Vasut <marex@denx.de> > > Best regards, > Marek Vasut > Yes, I tested it only on iMX6. Regards Luca Ellero
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 7a064ab..428a250 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -305,7 +305,7 @@ static void mxs_nand_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) d->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ | MXS_DMA_DESC_IRQ | MXS_DMA_DESC_CHAIN | MXS_DMA_DESC_DEC_SEM | - MXS_DMA_DESC_WAIT4END | (3 << MXS_DMA_DESC_PIO_WORDS_OFFSET) | + MXS_DMA_DESC_WAIT4END | (1 << MXS_DMA_DESC_PIO_WORDS_OFFSET) | (nand_info->cmd_queue_len << MXS_DMA_DESC_BYTES_OFFSET); d->cmd.address = (dma_addr_t)nand_info->cmd_buf; @@ -453,7 +453,7 @@ static void mxs_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int length) d->cmd.data = MXS_DMA_DESC_COMMAND_NO_DMAXFER | MXS_DMA_DESC_IRQ | MXS_DMA_DESC_NAND_WAIT_4_READY | MXS_DMA_DESC_DEC_SEM | - MXS_DMA_DESC_WAIT4END | (4 << MXS_DMA_DESC_PIO_WORDS_OFFSET); + MXS_DMA_DESC_WAIT4END | (1 << MXS_DMA_DESC_PIO_WORDS_OFFSET); d->cmd.address = 0; @@ -510,7 +510,7 @@ static void mxs_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, d->cmd.data = MXS_DMA_DESC_COMMAND_DMA_READ | MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM | MXS_DMA_DESC_WAIT4END | - (4 << MXS_DMA_DESC_PIO_WORDS_OFFSET) | + (1 << MXS_DMA_DESC_PIO_WORDS_OFFSET) | (length << MXS_DMA_DESC_BYTES_OFFSET); d->cmd.address = (dma_addr_t)nand_info->data_buf;
As stated in the iMX6 Reference Manual (Ch. 14.2), the CMDPIOWORDS field should reflect the number of pio_words sent in the actual DMA transfer. In all these transfers there is only one pio_word, so data field must be 1. Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com> --- Changes for v2: - merge together all the patchset drivers/mtd/nand/mxs_nand.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)