| Message ID | 1423063323-19419-8-git-send-email-Zubair.Kakakhel@imgtec.com |
|---|---|
| State | Needs Review / ACK, archived |
| Headers | show |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | warning | total: 1 errors, 0 warnings, 0 lines checked |
| robh/patch-applied | success |
Hello. On 02/04/2015 06:21 PM, Zubair Lutfullah Kakakhel wrote: > From: Paul Burton <paul.burton@imgtec.com> > Add binding documentation for the Ingenic jz4740 interrupt controller. > Signed-off-by: Paul Burton <paul.burton@imgtec.com> > Cc: Lars-Peter Clausen <lars@metafoo.de> > Cc: devicetree@vger.kernel.org > --- > .../interrupt-controller/ingenic,jz4740-intc.txt | 26 ++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt > diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt > new file mode 100644 > index 0000000..5e7f4bb > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt > @@ -0,0 +1,26 @@ > +Ingenic jz4740 SoC Interrupt Controller JZ4740? > + > +Required properties: > + > +- compatible : should be "ingenic,jz4740-intc" or "ingenic,jz4780-intc" > +- reg : Specifies base physical address and size of the registers. > +- interrupt-controller : Identifies the node as an interrupt controller > +- #interrupt-cells : Specifies the number of cells needed to encode an > + interrupt source. The value shall be 1. > +- interrupts - Specifies the CPU interrupt the controller is connected to. > + > +Optional properties: > +- interrupt-parent: phandle of the CPU interrupt controller. > + > +Example: > + > +intc: intc@10001000 { Name it "interrupt-controller@10001000", please. > + compatible = "ingenic,jz4740-intc"; > + reg = <0x10001000 0x14>; > + > + interrupt-controller; > + #interrupt-cells = <1>; > + > + interrupt-parent = <&cpuintc>; > + interrupts = <2>; > +}; WBR, Sergei -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt new file mode 100644 index 0000000..5e7f4bb --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt @@ -0,0 +1,26 @@ +Ingenic jz4740 SoC Interrupt Controller + +Required properties: + +- compatible : should be "ingenic,jz4740-intc" or "ingenic,jz4780-intc" +- reg : Specifies base physical address and size of the registers. +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- interrupts - Specifies the CPU interrupt the controller is connected to. + +Optional properties: +- interrupt-parent: phandle of the CPU interrupt controller. + +Example: + +intc: intc@10001000 { + compatible = "ingenic,jz4740-intc"; + reg = <0x10001000 0x14>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; +};