diff mbox

[1/2] xtensa: drop unimplemented floating point operations

Message ID 1413153962-2519-2-git-send-email-jcmvbkbc@gmail.com
State New
Headers show

Commit Message

Max Filippov Oct. 12, 2014, 10:46 p.m. UTC 
xtensa ISA never implemented FP division, reciprocal, square root and
inverse square root as single opcode. Remove patterns that can emit
them.

2014-10-09  Max Filippov  <jcmvbkbc@gmail.com>

gcc/
    * config/xtensa/xtensa.md (divsf3, *recipsf2, sqrtsf2, *rsqrtsf2):
    remove.
---
 gcc/config/xtensa/xtensa.md | 44 +-------------------------------------------
 1 file changed, 1 insertion(+), 43 deletions(-)

Comments

augustine.sterling@gmail.com Oct. 13, 2014, 4:05 p.m. UTC | #1 
On Sun, Oct 12, 2014 at 3:46 PM, Max Filippov <jcmvbkbc@gmail.com> wrote:
> xtensa ISA never implemented FP division, reciprocal, square root and
> inverse square root as single opcode. Remove patterns that can emit
> them.
>
> 2014-10-09  Max Filippov  <jcmvbkbc@gmail.com>
>
> gcc/
>     * config/xtensa/xtensa.md (divsf3, *recipsf2, sqrtsf2, *rsqrtsf2):
>     remove.

Approved.
Max Filippov Oct. 15, 2014, 4:22 a.m. UTC | #2 
On Mon, Oct 13, 2014 at 8:05 PM, augustine.sterling@gmail.com
<augustine.sterling@gmail.com> wrote:
> On Sun, Oct 12, 2014 at 3:46 PM, Max Filippov <jcmvbkbc@gmail.com> wrote:
>> xtensa ISA never implemented FP division, reciprocal, square root and
>> inverse square root as single opcode. Remove patterns that can emit
>> them.
>>
>> 2014-10-09  Max Filippov  <jcmvbkbc@gmail.com>
>>
>> gcc/
>>     * config/xtensa/xtensa.md (divsf3, *recipsf2, sqrtsf2, *rsqrtsf2):
>>     remove.
>
> Approved.

Applied to trunk. Thanks!

-- Max
diff mbox

Patch

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index dddc6ab..0e3f033 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -82,7 +82,7 @@ 
 ;; Attributes.
 
 (define_attr "type"
-  "unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fdiv,fsqrt,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry"
+  "unknown,jump,call,load,store,move,arith,multi,nop,farith,fmadd,fconv,fload,fstore,mul16,mul32,div32,mac16,rsr,wsr,entry"
   (const_string "unknown"))
 
 (define_attr "mode"
@@ -360,26 +360,6 @@ 
    (set_attr "mode"	"SI")
    (set_attr "length"	"3")])
 
-(define_insn "divsf3"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-	(div:SF (match_operand:SF 1 "register_operand" "f")
-		(match_operand:SF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT_DIV"
-  "div.s\t%0, %1, %2"
-  [(set_attr "type"	"fdiv")
-   (set_attr "mode"	"SF")
-   (set_attr "length"	"3")])
-
-(define_insn "*recipsf2"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-	(div:SF (match_operand:SF 1 "const_float_1_operand" "")
-		(match_operand:SF 2 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT_RECIP && flag_unsafe_math_optimizations"
-  "recip.s\t%0, %2"
-  [(set_attr "type"	"fdiv")
-   (set_attr "mode"	"SF")
-   (set_attr "length"	"3")])
-
 
 ;; Remainders.
 
@@ -404,28 +384,6 @@ 
    (set_attr "length"	"3")])
 
 
-;; Square roots.
-
-(define_insn "sqrtsf2"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-	(sqrt:SF (match_operand:SF 1 "register_operand" "f")))]
-  "TARGET_HARD_FLOAT_SQRT"
-  "sqrt.s\t%0, %1"
-  [(set_attr "type"	"fsqrt")
-   (set_attr "mode"	"SF")
-   (set_attr "length"	"3")])
-
-(define_insn "*rsqrtsf2"
-  [(set (match_operand:SF 0 "register_operand" "=f")
-	(div:SF (match_operand:SF 1 "const_float_1_operand" "")
-		(sqrt:SF (match_operand:SF 2 "register_operand" "f"))))]
-  "TARGET_HARD_FLOAT_RSQRT && flag_unsafe_math_optimizations"
-  "rsqrt.s\t%0, %2"
-  [(set_attr "type"	"fsqrt")
-   (set_attr "mode"	"SF")
-   (set_attr "length"	"3")])
-
-
 ;; Absolute value.
 
 (define_insn "abssi2"