| Message ID | 1389333139-26841-3-git-send-email-haijun.zhang@freescale.com |
|---|---|
| State | Accepted |
| Delegated to: | York Sun |
| Headers | show |
Hi Haijun, On Jan 10, 2014, at 7:52 AM, Haijun Zhang wrote: > On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the > 32-bit source address specifies the memory address in block address > format. Block length is fixed to 512 bytes as per the SD High Capacity > specification. So we need to convert the block address format > to byte address format to calculate the envaddr. > > If there is no enough space for environment variables or envaddr > is larger than 4GiB, we relocate the envaddr to 0x400. The address > relocated is in the front of the first partition that is assigned > for sdboot only. > > Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> > --- > changes for V3: > - Define quirk in SOC specific file instead of code in driver > changes for V2: > - Use 0xffffffffu instead of UINT_MAX > > arch/powerpc/include/asm/config_mpc85xx.h | 3 +++ > board/freescale/common/sdhc_boot.c | 29 +++++++++++++++++++++++++++++ > 2 files changed, 32 insertions(+) > > diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h > index 15affdc..e8bd76a 100644 > --- a/arch/powerpc/include/asm/config_mpc85xx.h > +++ b/arch/powerpc/include/asm/config_mpc85xx.h > @@ -152,6 +152,7 @@ > #define CONFIG_SYS_FSL_ERRATUM_A005125 > #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 > #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 > +#define CONFIG_ESDHC_HC_BLK_ADDR > > /* P1011 is single core version of P1020 */ > #elif defined(CONFIG_P1011) > @@ -552,6 +553,7 @@ > #define CONFIG_NAND_FSL_IFC > #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 > #define CONFIG_SYS_FSL_ERRATUM_A005125 > +#define CONFIG_ESDHC_HC_BLK_ADDR > > #elif defined(CONFIG_BSC9132) > #define CONFIG_MAX_CPUS 2 > @@ -575,6 +577,7 @@ > #define CONFIG_SYS_FSL_ERRATUM_A005125 > #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 > #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 > +#define CONFIG_ESDHC_HC_BLK_ADDR > > #elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) > #define CONFIG_E6500 > diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c > index f6e2b2b..022f38b 100644 > --- a/board/freescale/common/sdhc_boot.c > +++ b/board/freescale/common/sdhc_boot.c > @@ -16,6 +16,8 @@ > #define ESDHC_BOOT_IMAGE_SIZE 0x48 > #define ESDHC_BOOT_IMAGE_ADDR 0x50 > > +#define ESDHC_DEFAULT_ENVADDR 0x400 > + > int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr) > { > u8 *tmp_buf; > @@ -39,6 +41,33 @@ int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr) > /* Get the code size from offset 0x48 */ > code_len = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_SIZE); > > +#ifdef CONFIG_ESDHC_HC_BLK_ADDR > + /* > + * On soc BSC9131, BSC9132: > + * In High Capacity SD Cards (> 2 GBytes), the 32-bit source address and > + * code length of these soc specify the memory address in block address > + * format. Block length is fixed to 512 bytes as per the SD High > + * Capacity specification. > + */ > + u64 tmp; > + > + if (mmc->high_capacity) { > + tmp = (u64)code_offset * blklen; > + tmp += code_len * blklen; > + } else > + tmp = code_offset + code_len; > + > + if ((tmp + CONFIG_ENV_SIZE > mmc->capacity) || > + (tmp > 0xFFFFFFFFU)) > + *env_addr = ESDHC_DEFAULT_ENVADDR; > + else > + *env_addr = tmp; > + > + free(tmp_buf); > + > + return 0; > +#endif > + > *env_addr = code_offset + code_len; > > free(tmp_buf); > -- > 1.8.4.1 > > Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 15affdc..e8bd76a 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -152,6 +152,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x10 +#define CONFIG_ESDHC_HC_BLK_ADDR /* P1011 is single core version of P1020 */ #elif defined(CONFIG_P1011) @@ -552,6 +553,7 @@ #define CONFIG_NAND_FSL_IFC #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_A005125 +#define CONFIG_ESDHC_HC_BLK_ADDR #elif defined(CONFIG_BSC9132) #define CONFIG_MAX_CPUS 2 @@ -575,6 +577,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A005125 #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447 #define CONFIG_SYS_FSL_A004447_SVR_REV 0x11 +#define CONFIG_ESDHC_HC_BLK_ADDR #elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) #define CONFIG_E6500 diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c index f6e2b2b..022f38b 100644 --- a/board/freescale/common/sdhc_boot.c +++ b/board/freescale/common/sdhc_boot.c @@ -16,6 +16,8 @@ #define ESDHC_BOOT_IMAGE_SIZE 0x48 #define ESDHC_BOOT_IMAGE_ADDR 0x50 +#define ESDHC_DEFAULT_ENVADDR 0x400 + int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr) { u8 *tmp_buf; @@ -39,6 +41,33 @@ int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr) /* Get the code size from offset 0x48 */ code_len = *(u32 *)(tmp_buf + ESDHC_BOOT_IMAGE_SIZE); +#ifdef CONFIG_ESDHC_HC_BLK_ADDR + /* + * On soc BSC9131, BSC9132: + * In High Capacity SD Cards (> 2 GBytes), the 32-bit source address and + * code length of these soc specify the memory address in block address + * format. Block length is fixed to 512 bytes as per the SD High + * Capacity specification. + */ + u64 tmp; + + if (mmc->high_capacity) { + tmp = (u64)code_offset * blklen; + tmp += code_len * blklen; + } else + tmp = code_offset + code_len; + + if ((tmp + CONFIG_ENV_SIZE > mmc->capacity) || + (tmp > 0xFFFFFFFFU)) + *env_addr = ESDHC_DEFAULT_ENVADDR; + else + *env_addr = tmp; + + free(tmp_buf); + + return 0; +#endif + *env_addr = code_offset + code_len; free(tmp_buf);
On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the 32-bit source address specifies the memory address in block address format. Block length is fixed to 512 bytes as per the SD High Capacity specification. So we need to convert the block address format to byte address format to calculate the envaddr. If there is no enough space for environment variables or envaddr is larger than 4GiB, we relocate the envaddr to 0x400. The address relocated is in the front of the first partition that is assigned for sdboot only. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> --- changes for V3: - Define quirk in SOC specific file instead of code in driver changes for V2: - Use 0xffffffffu instead of UINT_MAX arch/powerpc/include/asm/config_mpc85xx.h | 3 +++ board/freescale/common/sdhc_boot.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+)