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[v2] Add MSI interrupts to DTS of MPC8315E-RDB

Message ID 4a2a9611.06c8100a.49ae.ffff88e4@mx.google.com (mailing list archive)
State Accepted, archived
Commit 4dc2a6cf82746c1e632aad0cd38615a35f8df075
Delegated to: Kumar Gala
Headers show

Commit Message

Leon Woestenberg June 6, 2009, 4:15 p.m. UTC 
The PCIe MSI interrupts are missing from the device tree source, and
thus were not enabled. This patch adds them.

v2 of the patch fixes inconsistent white space, reported by David Gibson.

Tested to work on MPC8315E-RDB with custom FPGA PCIe device.

Signed-off-by: Leon Woestenberg <leon@sidebranch.com>
Tested-by: Leon Woestenberg <leon@sidebranch.com>

Comments

Kumar Gala June 11, 2009, 1:50 a.m. UTC | #1 
On Jun 6, 2009, at 11:15 AM, leon.woestenberg@gmail.com wrote:

> The PCIe MSI interrupts are missing from the device tree source, and
> thus were not enabled. This patch adds them.
>
> v2 of the patch fixes inconsistent white space, reported by David  
> Gibson.
>
> Tested to work on MPC8315E-RDB with custom FPGA PCIe device.
>
> Signed-off-by: Leon Woestenberg <leon@sidebranch.com>
> Tested-by: Leon Woestenberg <leon@sidebranch.com>

applied to next.

- k
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Patch

Index: git/arch/powerpc/boot/dts/mpc8315erdb.dts
===================================================================
--- git.orig/arch/powerpc/boot/dts/mpc8315erdb.dts	2009-05-23 20:49:40.000000000 +0200
+++ git/arch/powerpc/boot/dts/mpc8315erdb.dts	2009-06-06 10:35:14.000000000 +0200
@@ -322,6 +322,21 @@ 
 			reg = <0x700 0x100>;
 			device_type = "ipic";
 		};
+
+		ipic-msi@7c0 {
+			compatible = "fsl,ipic-msi";
+			reg = <0x7c0 0x40>;
+			msi-available-ranges = <0 0x100>;
+			interrupts = <0x43 0x8
+				      0x4  0x8
+				      0x51 0x8
+				      0x52 0x8
+				      0x56 0x8
+				      0x57 0x8
+				      0x58 0x8
+				      0x59 0x8>;
+			interrupt-parent = < &ipic >;
+		};
 	};
 
 	pci0: pci@e0008500 {