Message ID | 8f583fe620e6a1606568f05a5d31486bb50e4caf.1383144568.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Delegated to: | Albert ARIBAUD |
Headers | show |
Hi Tom, On 10/30/2013 03:49 PM, Michal Simek wrote: > From: Soren Brinkmann <soren.brinkmann@xilinx.com> > > Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > drivers/serial/serial_zynq.c | 4 ---- > 1 file changed, 4 deletions(-) Can you please add this patch to your tree? If you like, I can send you pull request but this is just single patch which could go through directly. Thanks, Michal
Hi Michal, On Wed, 30 Oct 2013 15:49:32 +0100, Michal Simek <michal.simek@xilinx.com> wrote: > From: Soren Brinkmann <soren.brinkmann@xilinx.com> > > Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > drivers/serial/serial_zynq.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c > index 050b9c0..ff28f3c 100644 > --- a/drivers/serial/serial_zynq.c > +++ b/drivers/serial/serial_zynq.c > @@ -21,10 +21,6 @@ > > #define ZYNQ_UART_MR_PARITY_NONE 0x00000020 /* No parity mode */ > > -/* Some clock/baud constants */ > -#define ZYNQ_UART_BDIV 15 /* Default/reset BDIV value */ > -#define ZYNQ_UART_BASECLK 3125000L /* master / (bdiv + 1) */ > - > struct uart_zynq { > u32 control; /* Control Register [8:0] */ > u32 mode; /* Mode Register [10:0] */ > -- > 1.8.2.3 > Applied to u-boot-arm/master, thanks! Amicalement,
On 12/10/2013 01:06 PM, Albert ARIBAUD wrote: > Hi Michal, > > On Wed, 30 Oct 2013 15:49:32 +0100, Michal Simek > <michal.simek@xilinx.com> wrote: > >> From: Soren Brinkmann <soren.brinkmann@xilinx.com> >> >> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> >> Signed-off-by: Michal Simek <michal.simek@xilinx.com> >> --- >> drivers/serial/serial_zynq.c | 4 ---- >> 1 file changed, 4 deletions(-) >> >> diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c >> index 050b9c0..ff28f3c 100644 >> --- a/drivers/serial/serial_zynq.c >> +++ b/drivers/serial/serial_zynq.c >> @@ -21,10 +21,6 @@ >> >> #define ZYNQ_UART_MR_PARITY_NONE 0x00000020 /* No parity mode */ >> >> -/* Some clock/baud constants */ >> -#define ZYNQ_UART_BDIV 15 /* Default/reset BDIV value */ >> -#define ZYNQ_UART_BASECLK 3125000L /* master / (bdiv + 1) */ >> - >> struct uart_zynq { >> u32 control; /* Control Register [8:0] */ >> u32 mode; /* Mode Register [10:0] */ >> -- >> 1.8.2.3 >> > > Applied to u-boot-arm/master, thanks! This has been already applied to Tom's tree. Thanks, Michal
Hi Michal, On Tue, 10 Dec 2013 13:11:47 +0100, Michal Simek <monstr@monstr.eu> wrote: > On 12/10/2013 01:06 PM, Albert ARIBAUD wrote: > > Hi Michal, > > > > On Wed, 30 Oct 2013 15:49:32 +0100, Michal Simek > > <michal.simek@xilinx.com> wrote: > > > >> From: Soren Brinkmann <soren.brinkmann@xilinx.com> > >> > >> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> > >> Signed-off-by: Michal Simek <michal.simek@xilinx.com> > >> --- > >> drivers/serial/serial_zynq.c | 4 ---- > >> 1 file changed, 4 deletions(-) > >> > >> diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c > >> index 050b9c0..ff28f3c 100644 > >> --- a/drivers/serial/serial_zynq.c > >> +++ b/drivers/serial/serial_zynq.c > >> @@ -21,10 +21,6 @@ > >> > >> #define ZYNQ_UART_MR_PARITY_NONE 0x00000020 /* No parity mode */ > >> > >> -/* Some clock/baud constants */ > >> -#define ZYNQ_UART_BDIV 15 /* Default/reset BDIV value */ > >> -#define ZYNQ_UART_BASECLK 3125000L /* master / (bdiv + 1) */ > >> - > >> struct uart_zynq { > >> u32 control; /* Control Register [8:0] */ > >> u32 mode; /* Mode Register [10:0] */ > >> -- > >> 1.8.2.3 > >> > > > > Applied to u-boot-arm/master, thanks! > > This has been already applied to Tom's tree. Well then, it was in my patchwork todo in error. :) But never mind: it'll merge just fine, that's what git is for. > Thanks, > Michal Amicalement,
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 050b9c0..ff28f3c 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -21,10 +21,6 @@ #define ZYNQ_UART_MR_PARITY_NONE 0x00000020 /* No parity mode */ -/* Some clock/baud constants */ -#define ZYNQ_UART_BDIV 15 /* Default/reset BDIV value */ -#define ZYNQ_UART_BASECLK 3125000L /* master / (bdiv + 1) */ - struct uart_zynq { u32 control; /* Control Register [8:0] */ u32 mode; /* Mode Register [10:0] */