diff mbox

[U-Boot,v4,1/7] arm: atmel: sama5d3: correct the ID for DBGU and PIT

Message ID 1384485158-24027-2-git-send-email-voice.shen@atmel.com
State Accepted, archived
Delegated to: Andreas Bießmann
Headers show

Commit Message

Bo Shen Nov. 15, 2013, 3:12 a.m. UTC
As the DBGU and PIT has its own ID on sama5d3 SoC, while not share
with SYS ID. So, correct them.

Signed-off-by: Bo Shen <voice.shen@atmel.com>

---
Changes in v4:
  - None
Changes in v3:
  - None
Changes in v2:
  - None

 arch/arm/cpu/armv7/at91/sama5d3_devices.c |    2 +-
 arch/arm/cpu/armv7/at91/timer.c           |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

Comments

Andreas Bießmann Dec. 1, 2013, 9:47 p.m. UTC | #1
Dear Bo Shen,

Bo Shen <voice.shen@atmel.com> writes:
>As the DBGU and PIT has its own ID on sama5d3 SoC, while not share
>with SYS ID. So, correct them.
>
>Signed-off-by: Bo Shen <voice.shen@atmel.com>
>
>---
>Changes in v4:
>  - None
>Changes in v3:
>  - None
>Changes in v2:
>  - None
>
> arch/arm/cpu/armv7/at91/sama5d3_devices.c |    2 +-
> arch/arm/cpu/armv7/at91/timer.c           |    2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bießmann
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/at91/sama5d3_devices.c b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
index 51f0a6d..ebe99d2 100644
--- a/arch/arm/cpu/armv7/at91/sama5d3_devices.c
+++ b/arch/arm/cpu/armv7/at91/sama5d3_devices.c
@@ -82,7 +82,7 @@  void at91_seriald_hw_init(void)
 	at91_set_a_periph(AT91_PIO_PORTB, 30, 0);	/* DRXD */
 
 	/* Enable clock */
-	at91_periph_clk_enable(ATMEL_ID_SYS);
+	at91_periph_clk_enable(ATMEL_ID_DBGU);
 }
 
 #if defined(CONFIG_ATMEL_SPI)
diff --git a/arch/arm/cpu/armv7/at91/timer.c b/arch/arm/cpu/armv7/at91/timer.c
index 3808aed..e3ebfe0 100644
--- a/arch/arm/cpu/armv7/at91/timer.c
+++ b/arch/arm/cpu/armv7/at91/timer.c
@@ -60,7 +60,7 @@  int timer_init(void)
 	at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
 
 	/* Enable PITC Clock */
-	at91_periph_clk_enable(ATMEL_ID_SYS);
+	at91_periph_clk_enable(ATMEL_ID_PIT);
 
 	/* Enable PITC */
 	writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);