===================================================================
@@ -27924,10 +27930,11 @@ arm_dbx_register_number (unsigned int re
static rtx
arm_dwarf_register_span (rtx rtl)
{
+ enum machine_mode mode;
unsigned regno;
+ rtx parts[8];
int nregs;
int i;
- rtx p;
regno = REGNO (rtl);
if (!IS_VFP_REGNUM (regno))
@@ -27940,15 +27947,33 @@ arm_dwarf_register_span (rtx rtl)
corresponding D register. Until GDB supports this, we shall use the
legacy encodings. We also use these encodings for D0-D15 for
compatibility with older debuggers. */
- if (VFP_REGNO_OK_FOR_SINGLE (regno))
+ mode = GET_MODE (rtl);
+ if (GET_MODE_SIZE (mode) < 8)
return NULL_RTX;
- nregs = GET_MODE_SIZE (GET_MODE (rtl)) / 8;
- p = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (nregs));
- for (i = 0; i < nregs; i++)
- XVECEXP (p, 0, i) = gen_rtx_REG (DImode, regno + i);
+ if (VFP_REGNO_OK_FOR_SINGLE (regno))
+ {
+ nregs = GET_MODE_SIZE (mode) / 4;
+ for (i = 0; i < nregs; i += 2)
+ if (TARGET_BIG_END)
+ {
+ parts[i] = gen_rtx_REG (SImode, regno + i + 1);
+ parts[i + 1] = gen_rtx_REG (SImode, regno + i);
+ }
+ else
+ {
+ parts[i] = gen_rtx_REG (SImode, regno + i);
+ parts[i + 1] = gen_rtx_REG (SImode, regno + i + 1);
+ }
+ }
+ else
+ {
+ nregs = GET_MODE_SIZE (mode) / 8;
+ for (i = 0; i < nregs; i++)
+ parts[i] = gen_rtx_REG (DImode, regno + i);
+ }
- return p;
+ return gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (nregs , parts));
}
#if ARM_UNWIND_INFO