diff mbox

[4/4] Add ARM registers definitions for Monitor commands

Message ID 1380905823-3981-5-git-send-email-chouteau@adacore.com
State New
Headers show

Commit Message

Fabien Chouteau Oct. 4, 2013, 4:57 p.m. UTC
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
---
 target-arm/Makefile.objs |    2 +-
 target-arm/cpu.c         |    7 +++++++
 target-arm/monitor.c     |   40 ++++++++++++++++++++++++++++++++++++++++
 3 files changed, 48 insertions(+), 1 deletion(-)
 create mode 100644 target-arm/monitor.c

Comments

Peter Maydell Oct. 4, 2013, 5:52 p.m. UTC | #1
On 5 October 2013 01:57, Fabien Chouteau <chouteau@adacore.com> wrote:
>
> Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
> ---
>  target-arm/Makefile.objs |    2 +-
>  target-arm/cpu.c         |    7 +++++++
>  target-arm/monitor.c     |   40 ++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 48 insertions(+), 1 deletion(-)
>  create mode 100644 target-arm/monitor.c
>
> diff --git a/target-arm/Makefile.objs b/target-arm/Makefile.objs
> index 6453f5c..6c3ec32 100644
> --- a/target-arm/Makefile.objs
> +++ b/target-arm/Makefile.objs
> @@ -1,5 +1,5 @@
>  obj-y += arm-semi.o
> -obj-$(CONFIG_SOFTMMU) += machine.o
> +obj-$(CONFIG_SOFTMMU) += machine.o monitor.o
>  obj-$(CONFIG_KVM) += kvm.o
>  obj-$(CONFIG_NO_KVM) += kvm-stub.o
>  obj-y += translate.o op_helper.o helper.o cpu.o
> diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> index d40f2a7..bb15ee8 100644
> --- a/target-arm/cpu.c
> +++ b/target-arm/cpu.c
> @@ -26,6 +26,9 @@
>  #include "hw/arm/arm.h"
>  #include "sysemu/sysemu.h"
>  #include "sysemu/kvm.h"
> +#include "monitor/monitor_def.h"
> +
> +extern const MonitorDef arm_monitor_defs[];
>
>  static void arm_cpu_set_pc(CPUState *cs, vaddr value)
>  {
> @@ -217,6 +220,10 @@ static void arm_cpu_initfn(Object *obj)
>                         ARRAY_SIZE(cpu->gt_timer_outputs));
>  #endif
>
> +#if !defined(CONFIG_USER_ONLY)
> +    cs->monitor_defs = arm_monitor_defs;
> +#endif
> +
>      if (tcg_enabled() && !inited) {
>          inited = true;
>          arm_translate_init();
> diff --git a/target-arm/monitor.c b/target-arm/monitor.c
> new file mode 100644
> index 0000000..0d68a14
> --- /dev/null
> +++ b/target-arm/monitor.c
> @@ -0,0 +1,40 @@
> +/*
> + * ARM MonitorDef
> + *
> + * Copyright (c) 2013 AdaCore
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include "monitor/monitor_def.h"
> +
> +const MonitorDef arm_monitor_defs[] = {
> +    { "r0",     offsetof(CPUARMState, regs[0])  },
> +    { "r1",     offsetof(CPUARMState, regs[1])  },

These fields are all 32 bits, not target_long,
so they need to be marked as MD_I32. (If you build an
aarch64-softmmu target then it will have target_long be
64 bit but still support all the 32 bit CPUs, so it does
make a difference.)

thanks
-- PMM
Fabien Chouteau Oct. 7, 2013, 10:12 a.m. UTC | #2
On 10/04/2013 07:52 PM, Peter Maydell wrote:
>> +#include "monitor/monitor_def.h"
>> +
>> +const MonitorDef arm_monitor_defs[] = {
>> +    { "r0",     offsetof(CPUARMState, regs[0])  },
>> +    { "r1",     offsetof(CPUARMState, regs[1])  },
> 
> These fields are all 32 bits, not target_long,
> so they need to be marked as MD_I32. (If you build an
> aarch64-softmmu target then it will have target_long be
> 64 bit but still support all the 32 bit CPUs, so it does
> make a difference.)
> 

OK, I'll mark them MD_I32.
diff mbox

Patch

diff --git a/target-arm/Makefile.objs b/target-arm/Makefile.objs
index 6453f5c..6c3ec32 100644
--- a/target-arm/Makefile.objs
+++ b/target-arm/Makefile.objs
@@ -1,5 +1,5 @@ 
 obj-y += arm-semi.o
-obj-$(CONFIG_SOFTMMU) += machine.o
+obj-$(CONFIG_SOFTMMU) += machine.o monitor.o
 obj-$(CONFIG_KVM) += kvm.o
 obj-$(CONFIG_NO_KVM) += kvm-stub.o
 obj-y += translate.o op_helper.o helper.o cpu.o
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index d40f2a7..bb15ee8 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -26,6 +26,9 @@ 
 #include "hw/arm/arm.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/kvm.h"
+#include "monitor/monitor_def.h"
+
+extern const MonitorDef arm_monitor_defs[];
 
 static void arm_cpu_set_pc(CPUState *cs, vaddr value)
 {
@@ -217,6 +220,10 @@  static void arm_cpu_initfn(Object *obj)
                        ARRAY_SIZE(cpu->gt_timer_outputs));
 #endif
 
+#if !defined(CONFIG_USER_ONLY)
+    cs->monitor_defs = arm_monitor_defs;
+#endif
+
     if (tcg_enabled() && !inited) {
         inited = true;
         arm_translate_init();
diff --git a/target-arm/monitor.c b/target-arm/monitor.c
new file mode 100644
index 0000000..0d68a14
--- /dev/null
+++ b/target-arm/monitor.c
@@ -0,0 +1,40 @@ 
+/*
+ * ARM MonitorDef
+ *
+ * Copyright (c) 2013 AdaCore
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "monitor/monitor_def.h"
+
+const MonitorDef arm_monitor_defs[] = {
+    { "r0",     offsetof(CPUARMState, regs[0])  },
+    { "r1",     offsetof(CPUARMState, regs[1])  },
+    { "r2",     offsetof(CPUARMState, regs[2])  },
+    { "r3",     offsetof(CPUARMState, regs[3])  },
+    { "r4",     offsetof(CPUARMState, regs[4])  },
+    { "r5",     offsetof(CPUARMState, regs[5])  },
+    { "r6",     offsetof(CPUARMState, regs[6])  },
+    { "r7",     offsetof(CPUARMState, regs[7])  },
+    { "r8",     offsetof(CPUARMState, regs[8])  },
+    { "r9",     offsetof(CPUARMState, regs[9])  },
+    { "r10",    offsetof(CPUARMState, regs[10]) },
+    { "r11",    offsetof(CPUARMState, regs[11]) },
+    { "r12",    offsetof(CPUARMState, regs[12]) },
+    { "r13|sp", offsetof(CPUARMState, regs[13]) },
+    { "r14|lr", offsetof(CPUARMState, regs[14]) },
+    { "r15|pc", offsetof(CPUARMState, regs[15]) },
+    { NULL },
+};